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2023-01-30 - 06:59

x86 Intel Xeon E3-1220 @3100 MHz, Linux 4.19.8-rt6 (Profile)

Latency plot of system in rack #1, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack1slot0.osadl.org (updated Wed Aug 03, 2022 12:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
839825835,7sleep10-21swapper/107:07:581
238772580,0sleep30-21swapper/307:45:193
81462570,0sleep28131-21sshd09:29:512
821825533,6sleep30-21swapper/307:06:063
687025443,7sleep00-21swapper/007:05:040
837225038,7sleep20-21swapper/207:07:462
298822280,9sleep395750irq/24-eno1-rx-09:24:033
51262170,0sleep35128-21bash09:14:253
867299154,3cyclictest33-21ksoftirqd/209:16:212
867299134,2cyclictest33-21ksoftirqd/209:11:462
866299135,3cyclictest25-21ksoftirqd/109:18:181
867999120,11cyclictest31749-21systemd-cgroups09:16:263
867299123,3cyclictest33-21ksoftirqd/209:23:502
866299121,3cyclictest18860-21kworker/1:109:20:431
866299120,3cyclictest25-21ksoftirqd/109:27:101
866299100,9cyclictest0-21swapper/109:09:591
866199100,9cyclictest0-21swapper/009:15:470
86729998,0cyclictest0-21swapper/209:01:142
86729998,0cyclictest0-21swapper/207:50:202
86729990,0cyclictest0-21swapper/208:15:022
86629998,0cyclictest0-21swapper/107:15:031
86629991,2cyclictest25-21ksoftirqd/109:11:351
86619998,0cyclictest0-21swapper/009:28:130
86799980,7cyclictest24035-21kworker/3:309:25:343
86729987,0cyclictest0-21swapper/208:08:152
86629987,0cyclictest0-21swapper/107:45:231
86629982,1cyclictest131rcu_sched08:50:011
86619980,7cyclictest31569-21sshd09:21:330
86799970,6cyclictest3829-21sshd08:17:573
86729976,0cyclictest0-21swapper/208:42:102
86729976,0cyclictest0-21swapper/208:25:512
86729976,0cyclictest0-21swapper/208:22:092
86729976,0cyclictest0-21swapper/207:55:312
86729975,1cyclictest33-21ksoftirqd/208:40:012
86729975,1cyclictest33-21ksoftirqd/208:40:002
86729970,6cyclictest12615-21sshd07:16:092
86729970,0cyclictest0-21swapper/208:04:032
86629975,1cyclictest25-21ksoftirqd/107:40:001
86629970,1cyclictest131rcu_sched08:40:011
86629970,1cyclictest131rcu_sched08:40:001
86619970,6cyclictest9879-21sshd09:12:060
86619970,6cyclictest28485-21sshd07:59:100
86619970,6cyclictest21229-21sshd09:01:100
86799965,0cyclictest0-21swapper/307:41:103
86799963,2cyclictest1398-21snmpd09:07:323
86799963,2cyclictest1398-21snmpd08:38:143
86799963,2cyclictest1398-21snmpd08:38:133
86799963,2cyclictest1398-21snmpd08:21:353
86799963,2cyclictest1398-21snmpd08:08:013
86799963,2cyclictest1398-21snmpd07:33:293
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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