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2018-07-19 - 06:08

Dates and Events:


Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

BoxArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 225003999219.07. 01:10
r0s1x86_​642 x 223001840019.07. 01:10
r0s1sx86_​644 x 233005280019.07. 01:10
r0s2x86_​644 x 126672127719.07. 01:11
r0s3x86_​646 x 236008638819.07. 01:11
r0s4x86_​642 x 237002952819.07. 01:12
r0s5x86_​644 x 235005586419.07. 01:12
r0s5sx86_​644 x 234005452819.07. 01:13
r0s6x86_​644 x 235005586419.07. 01:13
r0s7x86_​646 x 230008017219.07. 01:14
r0s8x86_​6416 x 2370021715219.07. 01:14
r0s8sx86_​646 x 234708338819.07. 01:15
r1s0x86_​644 x 131002481519.07. 01:16
r1s1x86_​642 x 16 x 1210013436819.07. 01:16
r1s2x86_​642 x 12400960019.07. 01:17
r1s3x86_​641 x 11800359019.07. 01:17
r1s4x86_​642 x 216671333219.07. 01:18
r1s5ppc2 x 1120040019.07. 01:18
r1s6x86_​642 x 221301702419.07. 01:18
r1s7arm​v6l1 x 1213053019.07. 01:19
r1s8i6861 x 21600639819.07. 01:19
r2s0x86_​644 x 131002481719.07. 01:20
r2s1arm​v5tejl1 x 120019919.07. 01:20
r2s2arm​v7l1 x 172049919.07. 01:20
r2s3arm​v7l1 x 160049519.07. 01:21
r2s4mips​641 x 180053119.07. 01:21
r2s5ppc1 x 13966626.01. 13:22
r2s6i6861 x 11500299919.07. 01:21
r2s7x86_​644 x 137002960019.07. 01:24
r2s8ppc1 x 14006619.07. 01:25
r3s0i6864 x 235005600019.07. 01:26
r3s1i6862 x 12400960019.07. 01:26
r3s2i6861 x 11530306119.07. 01:26
r3s3x86_​646 x 233337999219.07. 01:27
r3s4x86_​641 x 21400559819.07. 01:27
r3s6x86_​641 x 21667666619.07. 01:28
r3s6sx86_​642 x 226672133219.07. 01:28
r3s7i6861 x 1533106619.07. 01:29
r3s8i6866 x 132003849819.07. 01:30
r4s0x86_​642 x 223001840019.07. 01:30
r4s1x86_​642 x 227002155319.07. 01:31
r4s1sx86_​642 x 221001673819.07. 01:32
r4s2arm​v7l1 x 180039819.07. 01:32
r4s2sarm​v7l1 x 180039819.07. 01:34
r4s3i5861 x 150099619.07. 01:36
r4s4ppc4 x 1120049819.07. 01:36
r4s5arm​v7l1 x 1500019.07. 01:37
r4s5saarch​644 x 1160020019.07. 01:37
r4s6x86_​644 x 234005431619.07. 01:37
r4s7i6864 x 118331466019.07. 01:38
r4s7sx86_​642 x 11833733019.07. 01:38
r4s8arm​v7l1 x 140039819.07. 01:39
r4s8sarm​v7l1 x 140039819.07. 01:39
r5s0x86_​642 x 222001758419.07. 01:39
r5s1i6864 x 233305318519.07. 01:40
r5s2x86_​644 x 127002169619.07. 01:40
r5s2sx86_​644 x 240006386312.04. 01:34
r5s3x86_​644 x 220003187219.07. 01:40
r5s3sx86_​644 x 116001274819.07. 01:41
r5s4x86_​642 x 225302026419.07. 01:42
r5s4si6862 x 225302026519.07. 01:42
r5s5arm​v7l1 x 160059719.07. 01:42
r5s5sarm​v7l1 x 160060019.07. 01:43
r5s6ppc1 x 153313319.07. 01:46
r5s7arm​v7l1 x 15286419.07. 01:47
r5s7sarm​v7l1 x 15284819.07. 01:48
r5s8ppc1 x 1400263719.07. 01:49
r6s0x86_​642 x 20 x 2170013614019.07. 01:49
r6s1x86_​642 x 12000798019.07. 01:49
r6s2x86_​642 x 11667957819.07. 01:50
r6s3x86_​644 x 222003511219.07. 01:50
r6s4x86_​642 x 11100437619.07. 01:50
r6s5i6861 x 11500299219.07. 01:51
r6s6i6861 x 11600319119.07. 01:52
r6s7i6862 x 12300917619.07. 01:52
r6s8x86_​642 x 223001838219.07. 01:52
r7s0x86_​642 x 223001841719.07. 01:53
r7s1x86_​644 x 116001283919.07. 01:53
r7s2i6861 x 1600119719.07. 01:54
r7s3arm​v6l1 x 1700519.07. 01:55
r7s3sarm​v7l4 x 1120015219.07. 01:56
r7s4arm​v7l1 x 153634819.07. 01:57
r7s5i6861 x 11300259319.07. 01:57
r7s5sx86_​642 x 133001324805.02. 13:54
r7s6arm​v7l1 x 1100039819.07. 01:58
r7s7x86_​644 x 116001276719.07. 02:00
r7s7sx86_​642 x 223001844819.07. 02:01
r7s8arm​v7l1 x 1100079619.07. 02:01
r7s8sarm​v7l1 x 1100079619.07. 02:01
r8s0x86_​642 x 223001841519.07. 02:02
r8s1i5861 x 130060119.07. 02:02
r8s2x86_​642 x 221001676019.07. 02:03
r8s2sx86_​642 x 221001676019.07. 02:03
r8s3x86_​644 x 235005586419.07. 02:04
r8s4i6864 x 118331466419.07. 02:04
r8s4si6864 x 118331466419.07. 02:04
r8s5i6864 x 234005440019.07. 02:05
r8s6arm​v7l1 x 150049819.07. 02:05
r8s7x86_​642 x 127001078019.07. 02:05
r8s7sx86_​642 x 133001324819.07. 02:06
r8s8i6862 x 11900758719.07. 02:06
r9s0x86_​642 x 223001841219.07. 02:07
r9s1x86_​642 x 12000399119.07. 02:07
r9s1sx86_​642 x 11140399919.07. 02:08
r9s2x86_​644 x 227004319219.07. 02:08
r9s3x86_​644 x 225003670519.07. 02:09
r9s3sx86_​644 x 130002400019.07. 02:09
r9s4i6861 x 21000399019.07. 02:09
r9s4sx86_​642 x 11333534719.07. 02:10
r9s5x86_​642 x 127001077819.07. 02:10
r9s5sx86_​644 x 234005455419.07. 02:11
r9s6x86_​642 x 230002396719.07. 02:11
r9s7arm​v7l2 x 11000019.07. 02:12
r9s8arm​v7l1 x 160059719.07. 02:12
r9s8sarm​v7l1 x 160059719.07. 02:13
ras0x86_​642 x 223001841519.07. 02:13
ras1i6861 x 11400279919.07. 02:13
ras2x86_​642 x 11067426619.07. 02:14
ras3aarch​648 x 12000400019.07. 02:14
ras3sarm​v7l8 x 1130074421.05. 14:08
ras4arm​v7l1 x 150039819.07. 02:14
ras5arm​v7l2 x 110002419.07. 02:15
ras5sarm​v7l2 x 110002419.07. 02:15
ras6arm​v7l1 x 11000198719.07. 02:15
ras6sarm​v7l1 x 11000198719.07. 02:15
ras7ppc1 x 13966519.07. 02:15
ras8i6862 x 125001077419.07. 02:16
ras8sx86_​644 x 116001274819.07. 02:16
rbs0i6862 x 225001759619.07. 02:17
rbs1x86_​644 x 131002480019.07. 02:17
rbs2i6861 x 11000199919.07. 02:17
rbs3arm​v7l4 x 190017619.07. 02:18
rbs3sarm​v7l4 x 1120022819.07. 02:18
rbs4x86_​644 x 11200960019.07. 02:19
rbs5i6862 x 12000799919.07. 02:19
rbs6x86_​644 x 119901597212.07. 02:23
rbs6sx86_​642 x 11333533219.07. 02:20
rbs7arm​v7l4 x 19962419.07. 02:20
rbs7sarm​v7l4 x 1996632419.07. 02:21
rbs8arm​v7l2 x 1666265019.07. 02:22
rcs0x86_​642 x 8 x 224007660019.07. 02:22
rcs0sx86_​648 x 136005779211.05. 14:21
rcs1x86_​646 x 234678337719.07. 02:24
rcs2x86_​642 x 128001123219.07. 02:24
rcs3i6862 x 11400558819.07. 02:25
rcs3sx86_​644 x 233005269619.07. 02:26
rcs4x86_​642 x 11100437819.07. 02:28
rcs5x86_​642 x 128001123219.07. 02:29
rcs5sx86_​642 x 128001123219.07. 02:31
rcs6x86_​644 x 135002793219.07. 02:33
rcs7x86_​642 x 218001440019.07. 02:33
rcs7sx86_​644 x 115001198019.07. 02:34
rcs8x86_​646 x 226706414019.07. 02:35
rcs8sx86_​644 x 233005280019.07. 02:35
 

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