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2025-12-23 - 01:51

Dates and Events:

OSADL Articles:

2024-10-02 12:00

Linux is now an RTOS!

PREEMPT_RT is mainline - What's next?


2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50039,99223.12. 01:10
r0s0sx86_​644 x 23,40054,39223.12. 01:10
r0s1x86_​644 x 22,30056,00023.12. 01:11
r0s1sx86_​644 x 23,30052,80023.12. 01:11
r0s2x86_​644 x 23,50055,86423.12. 01:11
r0s2sx86_​6410 x 13,70073,99023.12. 01:12
r0s3x86_​648 x 23,600115,20013.12. 01:13
r0s3sx86_​644 x 23,60067,20023.12. 01:13
r0s4x86_​648 x 23,600115,20023.12. 01:14
r0s4sx86_​648 x 23,600115,20023.12. 01:14
r0s5x86_​648 x 23,500115,20023.12. 01:15
r0s5sx86_​648 x 23,600115,20023.12. 01:16
r0s6x86_​648 x 23,600115,20023.12. 01:16
r0s6sx86_​6410 x 23,700147,98023.12. 01:19
r0s7x86_​648 x 23,600115,20023.12. 01:20
r0s7sx86_​642 x 23,70029,53223.05. 13:21
r0s8x86_​648 x 23,600115,20023.12. 01:21
r0s8sx86_​646 x 23,47083,37612.12. 01:22
r1s0x86_​644 x 13,10024,80023.12. 01:22
r1s1x86_​642 x 22,60021,69623.12. 01:22
r1s2x86_​644 x 12,30027,99623.12. 01:23
r1s2sx86_​644 x 12,30028,00023.12. 01:24
r1s3x86_​644 x 12,80022,42423.12. 01:24
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r1s4arm​v7l2 x 11,2004823.12. 01:25
r1s4sarm​v7l2 x 14004823.12. 01:26
r1s5aarch​644 x 11,20079623.12. 01:26
r1s6x86_​642 x 22,13017,06423.12. 01:27
r1s6sx86_​642 x 21,66713,33223.12. 01:27
r1s7arm​v6l1 x 11,66753023.12. 01:28
r1s8i6861 x 21,6006,40023.12. 01:28
r1s8sx86_​644 x 11,90015,19623.12. 01:29
r2s0x86_​644 x 13,10024,79623.12. 01:29
r2s1arm​v5tejl1 x 120019923.12. 01:30
r2s2arm​v7l1 x 172049923.12. 01:31
r2s3arm​v7l0 x 1 x 162462423.12. 01:31
r2s3sarm​v7l0 x 2 x 16001,20023.12. 01:32
r2s4mips​641 x 180053129.09. 13:34
r2s5ppc1 x 13966623.12. 01:33
r2s5sarm​v7l4 x 11,20015212.12. 01:35
r2s6i6861 x 11,5002,99923.12. 01:33
r2s6saarch​644 x 11,3506423.12. 01:34
r2s7aarch​644 x 12,40043223.12. 01:34
r2s7saarch​644 x 11,50043223.12. 01:35
r2s8ppc1 x 14006623.12. 01:36
r3s0i6864 x 23,50055,99223.12. 01:37
r3s1i6864 x 12,40019,12823.12. 01:38
r3s2riscv641 x 11,00028423.12. 01:38
r3s2sriscv644 x 1028423.12. 01:39
r3s3x86_​646 x 23,33379,99223.12. 01:39
r3s3sx86_​644 x 13,40011,98023.12. 01:40
r3s4aarch​646 x 11,3009623.12. 01:41
r3s5i5861 x 113326523.12. 01:42
r3s5sppc2 x 11,20040021.12. 13:43
r3s6x86_​641 x 21,6606,66623.12. 01:44
r3s6sx86_​642 x 22,66721,33223.12. 01:44
r3s7i6861 x 15331,06623.12. 01:45
r3s8i6864 x 13,20027,37123.12. 01:46
r4s0x86_​642 x 22,30018,40023.12. 01:47
r4s1arm​v7l4 x 11,50079223.12. 01:47
r4s1sarm​v7l4 x 11,50086423.12. 01:48
r4s2arm​v7l1 x 180079623.12. 01:49
r4s2sarm​v7l1 x 180053023.12. 01:50
r4s3i5861 x 150099622.12. 13:52
r4s3si6861 x 11,4662,93228.07. 02:17
r4s4ppc4 x 11,20049822.12. 13:53
r4s5arm​v7l1 x 1500022.12. 13:56
r4s5saarch​644 x 11,60020012.12. 02:02
r4s6x86_​644 x 23,40054,25622.12. 13:57
r4s6sarm​v7l0 x 1 x 11,0006622.12. 13:57
r4s7i6864 x 11,83314,66422.12. 13:58
r4s7sx86_​642 x 11,8337,33222.12. 13:59
r4s8arm​v7l1 x 140039822.12. 13:59
r4s8sarm​v7l1 x 140039822.12. 14:00
r5s0x86_​642 x 22,20017,58222.12. 14:01
r5s1x86_​646 x 13,33340,00222.12. 14:01
r5s2x86_​644 x 12,70021,69922.12. 14:01
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r5s3x86_​644 x 22,00031,87222.12. 14:02
r5s3sx86_​644 x 11,60012,74822.12. 14:03
r5s4x86_​642 x 22,53020,26422.12. 14:04
r5s4sx86_​644 x 11,60012,74822.12. 14:04
r5s5arm​v7l1 x 160059722.12. 14:06
r5s5sarm​v7l1 x 160060022.12. 14:08
r5s6ppc1 x 153313322.12. 14:11
r5s7arm​v7l1 x 15286412.12. 02:17
r5s7sarm​v7l1 x 15284822.12. 14:12
r5s8x86_​644 x 12,00015,97212.12. 02:20
r6s0x86_​642 x 10 x 21,700136,14022.12. 14:13
r6s1x86_​642 x 12,0007,97812.12. 02:21
r6s2x86_​642 x 11,6679,57812.12. 02:22
r6s3x86_​644 x 22,20035,12022.12. 14:14
r6s4x86_​642 x 11,1004,37622.12. 14:15
r6s5i6861 x 11,5002,99222.12. 14:16
r6s6i6861 x 11,6003,19222.12. 14:17
r6s7i6862 x 12,3009,17622.12. 14:17
r6s8x86_​642 x 22,30018,35622.12. 14:18
r7s0x86_​642 x 22,30018,40022.12. 14:18
r7s1x86_​644 x 11,60012,83922.12. 14:19
r7s2aarch​642 x 11,7009622.12. 14:19
r7s2sriscv644 x 1028412.12. 02:29
r7s3arm​v6l1 x 1700522.12. 14:20
r7s3sarm​v7l4 x 11,40015222.12. 14:22
r7s4arm​v7l1 x 153634822.12. 14:23
r7s4sarm​v7l4 x 11,5001,08022.12. 14:23
r7s5i6861 x 11,3002,59322.12. 14:24
r7s6arm​v7l1 x 11,00039828.02. 14:10
r7s7x86_​644 x 11,60012,76722.12. 14:25
r7s7sx86_​642 x 22,30018,39622.12. 14:25
r7s8arm​v7l1 x 11,00099522.12. 14:26
r7s8sarm​v7l1 x 11,00099612.12. 02:37
r8s0x86_​642 x 22,30018,40022.12. 14:27
r8s1i5861 x 135070122.12. 14:28
r8s3x86_​644 x 12,66721,28022.12. 14:29
r8s4x86_​644 x 21,60028,80022.12. 14:29
r8s4sx86_​644 x 21,60028,80022.12. 14:30
r8s5i6864 x 23,40054,40022.12. 14:30
r8s6arm​v7l1 x 150049822.12. 14:31
r8s6sx86_​644 x 13,30026,41622.12. 14:31
r8s7x86_​644 x 13,20025,49622.12. 14:32
r8s7sx86_​642 x 13,00011,98022.12. 14:32
r8s8x86_​642 x 11,3005,14422.12. 14:33
r9s0x86_​644 x 23,60057,60022.12. 14:33
r9s1x86_​642 x 12,0003,99212.12. 02:46
r9s1sarm​v7l1 x 101,25014.04. 18:03
r9s2x86_​644 x 11,60012,74822.12. 14:34
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r9s3x86_​644 x 11,60012,74822.12. 14:35
r9s3sx86_​644 x 13,00024,00022.12. 14:36
r9s4i6861 x 21,0003,99022.12. 14:36
r9s4sx86_​642 x 11,3335,34722.12. 14:37
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s5sx86_​642 x 13,30013,19822.12. 14:38
r9s6x86_​642 x 23,00023,94422.12. 14:38
r9s7arm​v7l2 x 11,000022.12. 14:39
r9s8sarm​v7l1 x 180079612.12. 02:52
ras0x86_​642 x 22,30018,41822.12. 14:40
ras1i6861 x 11,4002,79922.12. 14:40
ras2x86_​642 x 11,0674,26622.12. 14:41
ras2sx86_​644 x 11,90015,05222.12. 14:41
ras3aarch​648 x 12,0004,00006.05. 03:01
ras3sarm​v7l1 x 11,30084022.12. 14:41
ras4aarch​648 x 12,40038422.12. 14:42
ras4saarch​648 x 12,40038429.09. 03:02
ras5arm​v7l2 x 11,0002422.12. 14:42
ras5sarm​v7l2 x 11,0002422.12. 14:43
ras6aarch​648 x 12,0003,20022.12. 14:43
ras6sarm​v7l1 x 11,0001,98722.12. 14:44
ras7ppc1 x 13966522.12. 14:45
ras8x86_​644 x 11,60014,40022.12. 14:45
ras8sx86_​644 x 11,60012,74822.12. 14:46
rbs0i6862 x 22,50017,60022.12. 14:46
rbs1x86_​644 x 12,00015,97222.12. 14:47
rbs2x86_​644 x 12,00015,97222.12. 14:47
rbs2sx86_​641 x 13,500007.09. 15:06
rbs3arm​v7l4 x 19962412.12. 03:02
rbs3sarm​v7l4 x 11,40035622.12. 14:48
rbs4x86_​644 x 11,2009,60022.12. 14:49
rbs4sx86_​644 x 11,60012,74822.12. 14:49
rbs5i6864 x 2049,66022.12. 14:50
rbs5saarch​644 x 11,6006422.12. 14:50
rbs6x86_​644 x 11,91515,32422.12. 14:51
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rbs7arm​v7l4 x 19961222.12. 14:51
rbs7sarm​v7l4 x 19962422.12. 14:53
rbs8arm​v7l2 x 16662,65022.12. 14:54
rbs8sx86_​644 x 22,40038,70422.12. 14:54
rcs0x86_​648 x 22,40076,40022.12. 14:56
rcs1x86_​646 x 23,46783,37622.12. 14:57
rcs2x86_​642 x 12,80011,23222.12. 14:58
rcs3i6862 x 11,4005,58622.12. 14:58
rcs3sx86_​644 x 13,30026,39622.12. 14:59
rcs4x86_​642 x 11,1004,37622.12. 15:00
rcs5x86_​642 x 12,80011,19822.12. 15:01
rcs5sx86_​642 x 12,80011,19822.12. 15:02
rcs6x86_​644 x 23,50063,99222.12. 15:03
rcs7x86_​642 x 21,80014,39622.12. 15:03
rcs7sx86_​644 x 11,50011,98022.12. 15:05
rcs8x86_​6416 x 23,700217,18422.12. 15:08
rcs8sx86_​644 x 23,30052,80022.12. 15:09
rds0x86_​644 x 21,80031,99222.12. 15:10
rds1x86_​644 x 11,60012,74822.12. 15:10
rds2x86_​644 x 11,60012,74822.12. 15:11
rds3x86_​644 x 11,60012,74822.12. 15:11
rds4x86_​644 x 11,60012,74822.12. 15:12
rds5x86_​644 x 11,60012,74822.12. 15:12
rds6x86_​644 x 11,60012,74822.12. 15:13
rds7x86_​644 x 11,60012,74822.12. 15:14
rds8x86_​644 x 11,60012,74822.12. 15:14
res0x86_​644 x 23,40054,39222.12. 15:15
res1x86_​644 x 11,60014,40022.12. 15:16
res1sx86_​644 x 11,60014,40022.12. 15:16
res2x86_​644 x 11,60014,40022.12. 15:17
res3x86_​644 x 12,00015,97222.12. 15:17
res3saarch​640 x 1 x 11,0001,60022.12. 15:18
res4x86_​644 x 11,90015,05222.12. 15:18
res4sx86_​644 x 11,90015,05222.12. 15:19
res5x86_​642 x 22,20019,20022.12. 15:19
res5sx86_​642 x 22,20019,20022.12. 15:20
res6x86_​644 x 11,1008,75222.12. 15:21
res6saarch​644 x 101,60022.12. 15:21
res7arm​v7l0 x 1 x 11,0001222.12. 15:22
res7sarm​v7l0 x 1 x 11,0001222.12. 15:23
res8x86_​644 x 11,90015,05222.12. 15:23
res8sx86_​644 x 11,90015,05222.12. 15:24
rfs0x86_​6416 x 22,000128,00022.12. 15:24
rfs1aarch​644 x 11,50043222.12. 15:25
rfs1saarch​644 x 11,50043222.12. 15:25
rfs2x86_​644 x 13,00024,00022.12. 15:26
rfs2sx86_​642 x 13,00011,99822.12. 15:26
rfs3x86_​644 x 11,60012,74822.12. 15:26
rfs3sx86_​644 x 11,60012,74822.12. 15:27
rfs4aarch​641 x 11,4001,60022.12. 15:27
rfs4sarm​v7l1 x 180080022.12. 15:28
rfs5aarch​644 x 11,2006422.12. 15:30
rfs5saarch​644 x 11,2006427.08. 03:49
rfs6arm​v7l1 x 16671,33222.12. 15:31
rfs6sarm​v7l1 x 16671,33222.12. 15:32
rfs7x86_​644 x 22,60041,60022.12. 15:32
rfs7sx86_​644 x 17006,44822.12. 15:33
rfs8arm​v7l1 x 11,00012004.03. 03:47
 

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