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2017-06-28 - 02:19

Dates and Events:

Breaking News:

2016-11-12 12:00

Raspberry Pi and real-time Linux

Let's have a look at the OSADL QA Farm data


2016-09-17 12:00

Preemption latency of real-time Linux systems

How to measure it – and how to fix it, if it's too high?


2014-11-18 00:00

Linux real-time: New stable release available -

but next one depends on more support from industrial users



Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

BoxArchCoresMHzBogo​MIPSEffective
r0s0x86_​642 x 225001997528.06. 01:10
r0s1x86_​642 x 223001840028.06. 01:10
r0s1sx86_​644 x 233005280028.06. 01:10
r0s2x86_​644 x 126672127728.06. 01:10
r0s3x86_​646 x 236008645728.06. 01:11
r0s4x86_​642 x 237002954228.06. 01:11
r0s5x86_​644 x 235005590828.06. 01:12
r0s6x86_​644 x 235005590728.06. 01:12
r0s7x86_​646 x 230008017228.06. 01:13
r0s8x86_​644 x 240006416228.06. 01:14
r0s8sx86_​646 x 234708319628.06. 01:14
r1s0x86_​644 x 131002481428.06. 01:15
r1s1x86_​642 x 16 x 1210013438428.06. 01:16
r1s2x86_​642 x 12400960028.06. 01:16
r1s3x86_​641 x 11800359028.06. 01:17
r1s4x86_​642 x 216671333228.06. 01:17
r1s5ppc2 x 1120040028.06. 01:18
r1s6x86_​642 x 221301702428.06. 01:18
r1s7arm​v6l1 x 1213053028.06. 01:19
r1s8i6861 x 21600640028.06. 01:19
r2s0x86_​644 x 131002481428.06. 01:19
r2s1arm​v5tejl1 x 120019928.06. 01:20
r2s2arm​v7l1 x 172049928.06. 01:20
r2s3arm​v7l1 x 160049528.06. 01:21
r2s4mips​641 x 180053128.06. 01:21
r2s5ppc1 x 13966628.06. 01:21
r2s6i6861 x 11500299928.06. 01:21
r2s7x86_​644 x 137002959428.06. 01:22
r2s8arm​v6l1 x 153253028.06. 01:22
r3s0i6862 x 225001995228.06. 01:22
r3s1i6864 x 124001912828.06. 01:23
r3s2i6861 x 11530306228.06. 01:23
r3s3x86_​646 x 233337999228.06. 01:24
r3s4x86_​641 x 21400560028.06. 01:24
r3s6x86_​641 x 21667666628.06. 01:25
r3s6sx86_​642 x 226672133228.06. 01:25
r3s7i6861 x 1533106628.06. 01:26
r3s8i6866 x 132003852428.06. 01:26
r4s0x86_​642 x 223001840028.06. 01:27
r4s1x86_​642 x 227002155328.06. 01:27
r4s1sx86_​642 x 221001673828.06. 01:28
r4s2arm​v7l1 x 180047728.06. 01:28
r4s2sarm​v7l1 x 180039828.06. 01:30
r4s3i5861 x 150099628.06. 01:32
r4s5arm​v7l1 x 1500028.06. 01:33
r4s6x86_​644 x 234005425628.06. 01:33
r4s7x86_​644 x 116001279628.06. 01:33
r4s8x86_​642 x 11140399928.06. 01:34
r5s0x86_​642 x 222001757928.06. 01:34
r5s1i6864 x 233305318528.06. 01:34
r5s2x86_​644 x 127002169828.06. 01:35
r5s2sx86_​644 x 240006386312.04. 01:34
r5s3x86_​644 x 220003187928.06. 01:35
r5s4x86_​642 x 225302026428.06. 01:36
r5s4si6862 x 225302026428.06. 01:36
r5s5arm​v7l1 x 160059728.06. 01:36
r5s5sarm​v7l1 x 160060028.06. 01:37
r5s6ppc1 x 153313328.06. 01:38
r5s7mips​1 x 149249228.06. 01:38
r5s8ppc1 x 1400263728.06. 01:38
r6s0x86_​648 x 136005778428.06. 01:39
r6s1x86_​642 x 12000798028.06. 01:39
r6s2x86_​642 x 11667957628.06. 01:39
r6s3x86_​644 x 222003512028.06. 01:40
r6s4x86_​641 x 12200438828.06. 01:40
r6s5i6861 x 11500299228.06. 01:41
r6s6i6861 x 11600319228.06. 01:42
r6s7i6862 x 12300917628.06. 01:42
r6s8x86_​642 x 223001838028.06. 01:42
r7s0x86_​642 x 223001839628.06. 01:43
r7s1x86_​644 x 116001283928.06. 01:43
r7s2i6861 x 1600119628.06. 01:43
r7s3i6861 x 1800160228.06. 01:45
r7s3sarm​v7l4 x 1120015228.06. 01:45
r7s4arm​v7l1 x 153634828.06. 01:46
r7s5i6861 x 11300259328.06. 01:46
r7s6arm​v7l1 x 1100039828.06. 01:47
r7s7arm​v7l2 x 11000397228.06. 01:50
r7s8arm​v7l1 x 1100079628.06. 01:53
r7s8sarm​v7l1 x 1100099328.06. 01:54
r8s0x86_​642 x 223001841528.06. 01:54
r8s1i5861 x 130060128.06. 01:55
r8s2x86_​642 x 129001157228.06. 01:55
r8s3x86_​644 x 235005587228.06. 01:56
r8s4i6864 x 118331466428.06. 01:56
r8s4si6864 x 118331466428.06. 01:57
r8s5i6864 x 234005440028.06. 01:57
r8s6arm​v7l1 x 150049828.06. 01:57
r8s7x86_​642 x 127001077628.06. 01:57
r8s7sx86_​644 x 234005452828.06. 01:58
r8s8i6862 x 11900758728.06. 01:58
r9s0x86_​642 x 223001841628.06. 01:59
r9s1x86_​642 x 12000399228.06. 01:59
r9s2x86_​644 x 227004320028.06. 02:00
r9s3x86_​644 x 225003669528.06. 02:00
r9s4i6861 x 21000399028.06. 02:00
r9s4sx86_​642 x 11333532828.06. 02:01
r9s5x86_​642 x 127001077628.06. 02:01
r9s5sx86_​644 x 234005452828.06. 02:02
r9s6x86_​642 x 230002394428.06. 02:02
r9s7arm​v7l2 x 11000028.06. 02:02
r9s8arm​v7l4 x 1996632428.06. 02:03
ras0x86_​642 x 223001840028.06. 02:06
ras1i6861 x 11400279928.06. 02:06
ras2x86_​642 x 11067426628.06. 02:06
ras3aarch​648 x 12000400028.06. 02:07
ras3sarm​v7l8 x 1130074421.05. 14:08
ras4arm​v7l1 x 150039828.06. 02:07
ras6sarm​v7l1 x 11000198730.05. 14:09
ras7ppc1 x 13966528.06. 02:08
ras8i6862 x 125001077628.06. 02:08
rbs0i6862 x 225001995228.06. 02:09
rbs1x86_​644 x 131002480028.06. 02:09
rbs2i6861 x 11000199927.06. 14:21
rbs3arm​v7l4 x 190015227.06. 14:21
rbs3sarm​v7l4 x 1120022827.06. 14:21
rbs4x86_​644 x 11200960027.06. 14:22
rbs5i6862 x 12000799927.06. 14:22
rbs6x86_​644 x 119901603727.06. 14:23
rbs7arm​v7l4 x 19962427.06. 14:23
rbs8arm​v7l2 x 1666265027.06. 14:24
rcs1x86_​646 x 234678324827.06. 14:24
rcs2x86_​642 x 128001123327.06. 14:24
rcs3i6862 x 11400558627.06. 14:25
rcs6x86_​644 x 125001996427.06. 14:25
rcs7x86_​642 x 218001439627.06. 14:26
rcs8x86_​646 x 226706411327.06. 14:26
 

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