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2022-09-30 - 13:16
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OSADL QA Farm on Real-time of Mainline Linux

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/usr/bin/Xorg /usr/bin/Xorg

Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

/usr/bin/Xorg /usr/bin/Xorg
BoxArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 225004000030.09. 13:10
r0s1x86_​644 x 223005599230.09. 13:10
r0s1sx86_​644 x 233005280030.09. 13:10
r0s2x86_​644 x 235005586430.09. 13:11
r0s2sx86_​6410 x 137007399030.09. 13:13
r0s3x86_​648 x 2360011520030.09. 13:13
r0s3sx86_​644 x 236006720030.09. 13:15
r0s4x86_​648 x 2360011520030.09. 01:16
r0s4sx86_​648 x 2360011520030.09. 01:18
r0s5x86_​648 x 2350011520030.09. 01:20
r0s5sx86_​648 x 2360011520030.09. 01:22
r0s6x86_​648 x 2360011520030.09. 01:24
r0s6sx86_​6410 x 2370014798030.09. 01:25
r0s7x86_​648 x 2360011520030.09. 01:26
r0s7sx86_​642 x 237002953230.09. 01:27
r0s8x86_​648 x 2360011520029.09. 01:27
r0s8sx86_​646 x 234708338830.09. 01:28
r1s0x86_​644 x 131002479630.09. 01:28
r1s1x86_​642 x 226002169630.09. 01:29
r1s2x86_​644 x 123002800030.09. 01:29
r1s2sx86_​644 x 123002800030.09. 01:30
r1s3x86_​644 x 235005600026.05. 01:16
r1s3sx86_​644 x 235005600026.05. 01:16
r1s4arm​v7l2 x 112004830.09. 01:30
r1s4sarm​v7l2 x 14004830.09. 01:31
r1s5aarch​644 x 1120079630.09. 01:31
r1s6x86_​642 x 221301706430.09. 01:31
r1s6sx86_​642 x 216671333230.09. 01:32
r1s7arm​v6l1 x 1166753030.09. 01:32
r1s8i6861 x 21600640030.09. 01:32
r1s8sx86_​644 x 119001519630.09. 01:33
r2s0x86_​644 x 131002480030.09. 01:33
r2s1arm​v5tejl1 x 120019928.06. 13:37
r2s2arm​v7l1 x 172049930.09. 01:34
r2s4mips​641 x 180053110.01. 01:23
r2s5ppc1 x 13966630.09. 01:34
r2s6i6861 x 11500299930.09. 01:35
r2s6sx86_​644 x 119901599209.02. 01:27
r2s7x86_​644 x 137002960010.03. 13:24
r2s8ppc1 x 14006630.09. 01:35
r3s0i6864 x 235005600030.09. 01:36
r3s1i6864 x 124001912730.09. 01:37
r3s2riscv641 x 1100028430.09. 01:37
r3s3x86_​646 x 233337999230.09. 01:38
r3s4x86_​641 x 21400560010.01. 01:28
r3s5i5861 x 113326530.09. 01:39
r3s5sppc2 x 1120040030.09. 01:41
r3s6x86_​641 x 21660666630.09. 01:42
r3s6sx86_​642 x 226672133230.09. 02:00
r3s7i6861 x 1533106630.09. 02:00
r3s8i6866 x 132003852630.09. 02:01
r4s0x86_​642 x 223001839630.09. 02:02
r4s1arm​v7l4 x 1150072030.09. 02:02
r4s1sarm​v7l4 x 1150093630.09. 02:03
r4s2arm​v7l1 x 180079630.09. 02:04
r4s2sarm​v7l1 x 180053030.09. 02:05
r4s3i5861 x 150099630.09. 02:08
r4s3si6861 x 11466293230.09. 02:09
r4s4ppc4 x 1120049830.09. 02:09
r4s5arm​v7l1 x 1500030.09. 02:12
r4s5saarch​644 x 1160020030.09. 02:12
r4s6x86_​644 x 234005425630.09. 02:13
r4s6sarm​v7l0 x 1 x 110006630.09. 02:13
r4s7i6864 x 118331466430.09. 02:14
r4s7sx86_​642 x 11833733230.09. 02:14
r4s8arm​v7l1 x 140039830.09. 02:14
r4s8sarm​v7l1 x 140039830.09. 02:15
r5s0x86_​642 x 222001758230.09. 02:16
r5s1x86_​646 x 133334009230.09. 02:17
r5s2x86_​644 x 127002169930.09. 02:17
r5s2sx86_​644 x 240006386312.04. 01:34
r5s3x86_​644 x 220003187230.09. 02:18
r5s3sx86_​644 x 116001274830.09. 02:18
r5s4x86_​642 x 225302026430.09. 02:19
r5s4sx86_​642 x 225302026830.09. 02:19
r5s5arm​v7l1 x 160059730.09. 02:20
r5s5sarm​v7l1 x 160060030.09. 02:22
r5s6ppc1 x 153313330.09. 02:25
r5s7arm​v7l1 x 15286430.09. 02:26
r5s7sarm​v7l1 x 15286430.09. 02:27
r6s0x86_​642 x 10 x 2170013614030.09. 02:28
r6s1x86_​642 x 12000797830.09. 02:29
r6s2x86_​642 x 11667957630.09. 02:30
r6s3x86_​644 x 222003512030.09. 02:30
r6s4x86_​642 x 11100437630.09. 02:31
r6s5i6861 x 11500299230.09. 02:31
r6s6i6861 x 11600319130.09. 02:32
r6s7i6862 x 12300917630.09. 02:32
r6s8x86_​642 x 223001835630.09. 02:33
r7s0x86_​642 x 223001840030.09. 02:33
r7s1x86_​644 x 116001284030.09. 02:33
r7s2sarm​v7l4 x 1150072013.07. 02:16
r7s3arm​v6l1 x 1700530.09. 02:34
r7s3sarm​v7l4 x 1140035630.09. 02:36
r7s4arm​v7l1 x 153634830.09. 02:37
r7s4sarm​v7l4 x 1150079230.09. 02:37
r7s5i6861 x 11300259330.09. 02:38
r7s6arm​v7l1 x 1100039828.02. 14:10
r7s7x86_​644 x 116001276730.09. 02:38
r7s7sx86_​642 x 223001844830.09. 02:39
r7s8arm​v7l1 x 1100099530.09. 02:39
r7s8sarm​v7l1 x 1100079630.09. 02:40
r8s0x86_​642 x 223001840030.09. 02:41
r8s1i5861 x 130060130.09. 02:41
r8s2x86_​642 x 221001676030.09. 02:42
r8s2sx86_​642 x 221001676030.09. 02:42
r8s3x86_​644 x 126672127630.09. 02:43
r8s4x86_​644 x 216002880030.09. 02:43
r8s4sx86_​644 x 216002880030.09. 02:44
r8s5i6864 x 234005440030.09. 02:45
r8s6arm​v7l1 x 150049814.08. 14:41
r8s7x86_​642 x 127001077630.09. 02:46
r8s7sx86_​642 x 133001324830.09. 02:47
r8s8x86_​642 x 11300514430.09. 02:47
r9s0x86_​642 x 223001839630.09. 02:48
r9s1x86_​642 x 12000399230.09. 02:48
r9s1sarm​v7l1 x 1125022.07. 09:38
r9s2x86_​644 x 116001274830.09. 02:48
r9s2sx86_​644 x 116001274830.08. 17:02
r9s3x86_​644 x 116001274830.09. 02:49
r9s3sx86_​644 x 130002400030.09. 02:49
r9s4i6861 x 21000398830.09. 02:50
r9s4sx86_​642 x 11333534730.09. 02:54
r9s5x86_​642 x 127001077630.09. 02:55
r9s5sx86_​642 x 135001399830.09. 02:55
r9s6x86_​642 x 230002394430.09. 02:56
r9s7arm​v7l2 x 11000030.09. 02:56
r9s8sarm​v7l1 x 180079630.09. 02:57
ras0x86_​642 x 223001841630.09. 02:57
ras1i6861 x 11400279930.09. 02:58
ras2x86_​642 x 11067426630.09. 02:58
ras3aarch​648 x 12000400007.11. 14:20
ras3sarm​v7l8 x 11300/200084025.11. 02:17
ras4arm​v7l1 x 150039821.09. 14:40
ras4sarm​v7l1 x 160059707.02. 02:45
ras5arm​v7l2 x 110002430.09. 02:59
ras5sarm​v7l2 x 110002430.09. 02:59
ras6arm​v7l1 x 11000198730.09. 02:59
ras6sarm​v7l1 x 11000198730.09. 03:00
ras7ppc1 x 13966530.09. 03:00
ras8x86_​644 x 116001440030.09. 03:00
ras8sx86_​644 x 116001274830.09. 03:01
rbs0i6862 x 225001760030.09. 03:01
rbs1x86_​644 x 131002479630.09. 03:02
rbs2x86_​644 x 232005120030.09. 03:02
rbs2sx86_​641 x 13500030.09. 03:03
rbs3arm​v7l4 x 19962430.09. 03:03
rbs3sarm​v7l4 x 1140035630.09. 03:03
rbs4x86_​644 x 11200960030.09. 03:04
rbs4sx86_​644 x 116001274830.09. 03:04
rbs5i6864 x 24916930.09. 03:05
rbs5saarch​644 x 116006430.09. 03:05
rbs6x86_​644 x 119151532430.09. 03:06
rbs6sx86_​642 x 11333533230.09. 03:06
rbs7arm​v7l4 x 19961230.09. 03:07
rbs7sarm​v7l4 x 19962430.09. 03:08
rbs8arm​v7l2 x 1666265030.09. 03:09
rbs8sx86_​644 x 224003870430.09. 03:09
rcs0x86_​648 x 224007736830.09. 03:11
rcs1x86_​646 x 234678327130.09. 03:12
rcs2x86_​642 x 128001123230.09. 03:12
rcs3i6862 x 11400558830.09. 03:13
rcs3sx86_​644 x 233005269630.09. 03:14
rcs4x86_​642 x 11100437630.09. 03:16
rcs4sx86_​644 x 11100875230.09. 03:17
rcs5x86_​642 x 128001119830.09. 03:17
rcs5sx86_​642 x 128001119830.09. 03:19
rcs6x86_​644 x 235006399230.09. 03:21
rcs7x86_​642 x 218001440030.09. 03:22
rcs7sx86_​644 x 115001198030.09. 03:23
rcs8x86_​6416 x 2370021715230.09. 03:26
rcs8sx86_​644 x 233005279230.09. 03:26
rds0x86_​644 x 218003199230.09. 03:27
rds1x86_​644 x 119101532430.09. 03:27
rds2x86_​644 x 119101532430.09. 03:28
rds3x86_​644 x 119101532430.09. 03:28
rds4x86_​644 x 119101532430.09. 03:29
rds5x86_​644 x 116001274830.09. 03:29
rds6x86_​644 x 116001274830.09. 03:30
rds7x86_​644 x 116001274830.09. 03:30
rds8x86_​644 x 116001274830.09. 03:30
res0x86_​644 x 218003199230.09. 03:31
res1x86_​644 x 116001440030.09. 03:32
res2x86_​644 x 116001440030.09. 03:32
res3x86_​644 x 119001505229.09. 15:27
res4x86_​644 x 119001505229.09. 03:28
res5x86_​642 x 222001920030.09. 03:33
res5sx86_​642 x 12200960030.09. 03:33
res6x86_​642 x 222001920019.01. 14:55
res7x86_​644 x 119001505230.09. 03:34
res8x86_​644 x 119001505230.09. 03:35
 

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