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2022-05-21 - 04:08

Dates and Events:

OSADL Articles:

2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available


2016-11-12 12:00

Raspberry Pi and real-time Linux

Let's have a look at the OSADL QA Farm data


2016-09-17 12:00

Preemption latency of real-time Linux systems

How to measure it – and how to fix it, if it's too high?



OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

BoxArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 225004000021.05. 01:10
r0s1x86_​644 x 223005599221.05. 01:10
r0s1sx86_​644 x 233005280021.05. 01:10
r0s2x86_​644 x 235005587221.05. 01:11
r0s2sx86_​648 x 2360011520022.12. 13:11
r0s3x86_​648 x 2360011520021.05. 01:13
r0s3sx86_​646 x 236008638818.05. 13:15
r0s4x86_​642 x 237002952821.05. 01:15
r0s4sx86_​648 x 2360011520021.05. 01:15
r0s5x86_​648 x 2350011520021.05. 01:17
r0s5sx86_​648 x 2360011520021.05. 01:17
r0s6x86_​648 x 2360011520021.05. 01:19
r0s6sx86_​6410 x 2360014798021.05. 01:20
r0s7x86_​648 x 2360011520021.05. 01:22
r0s7sx86_​648 x 2360011520021.05. 01:23
r0s8x86_​648 x 2360011520021.05. 01:24
r0s8sx86_​646 x 234708337621.05. 01:26
r1s0x86_​644 x 131002479621.05. 01:27
r1s1x86_​642 x 226002169621.05. 01:27
r1s2x86_​644 x 123002800021.05. 01:27
r1s2sx86_​644 x 123002800021.05. 01:28
r1s3x86_​644 x 235005600026.05. 01:16
r1s3sx86_​644 x 235005600026.05. 01:16
r1s4arm​v7l2 x 112004821.05. 01:28
r1s4sarm​v7l2 x 14004821.05. 01:29
r1s5aarch​644 x 1120079621.05. 01:29
r1s6x86_​642 x 221301706421.05. 01:29
r1s6sx86_​642 x 216671333221.05. 01:30
r1s7arm​v6l1 x 1166753021.05. 01:30
r1s8i6861 x 21600640021.05. 01:31
r1s8sx86_​644 x 119001519621.05. 01:31
r2s0x86_​644 x 131002480021.05. 01:32
r2s1arm​v5tejl1 x 120019911.02. 01:31
r2s2arm​v7l1 x 172049921.05. 01:32
r2s4mips​641 x 180053110.01. 01:23
r2s5ppc1 x 13966621.05. 01:32
r2s6i6861 x 11500299921.05. 01:33
r2s6sx86_​644 x 119901599209.02. 01:27
r2s7x86_​644 x 137002960010.03. 13:24
r2s8ppc1 x 14006621.05. 01:33
r3s0i6864 x 235005599221.05. 01:34
r3s1i6864 x 124001912721.05. 01:34
r3s2riscv641 x 1100028421.05. 01:35
r3s3x86_​646 x 233337999221.05. 01:36
r3s4x86_​641 x 21400560010.01. 01:28
r3s5i5861 x 113326521.05. 01:37
r3s5sppc2 x 1120040021.05. 01:38
r3s6x86_​641 x 21660666621.05. 01:39
r3s6sx86_​642 x 226672133220.05. 01:40
r3s7i6861 x 1533106620.05. 01:40
r3s8i6866 x 132003852620.05. 01:41
r4s0x86_​642 x 223001839620.05. 01:42
r4s1arm​v7l4 x 1150079218.05. 01:44
r4s1sarm​v7l4 x 1150079220.05. 01:43
r4s2arm​v7l1 x 180079620.05. 01:43
r4s2sarm​v7l1 x 180053020.05. 01:44
r4s3i5861 x 150099620.05. 01:47
r4s3si6861 x 11466293220.05. 01:48
r4s4ppc4 x 1120049820.05. 01:49
r4s5arm​v7l1 x 1500020.05. 01:52
r4s5saarch​644 x 1160020020.05. 01:52
r4s6x86_​644 x 234005425624.12. 02:23
r4s6sarm​v7l0 x 1 x 110006620.05. 01:52
r4s7i6864 x 118331466420.05. 01:53
r4s7sx86_​642 x 11833733220.05. 01:54
r4s8arm​v7l1 x 140039820.05. 01:54
r4s8sarm​v7l1 x 140039820.05. 01:55
r5s0x86_​642 x 222001758220.05. 01:55
r5s1x86_​646 x 133334009220.05. 01:55
r5s2x86_​644 x 127002169920.05. 01:56
r5s2sx86_​644 x 240006386312.04. 01:34
r5s3x86_​644 x 220003187220.05. 01:56
r5s3sx86_​644 x 116001274820.05. 01:57
r5s4x86_​642 x 225302026420.05. 01:58
r5s4sx86_​642 x 225302026420.05. 01:58
r5s5arm​v7l1 x 160059720.05. 01:59
r5s5sarm​v7l1 x 160060020.05. 02:01
r5s6ppc1 x 153313320.05. 02:04
r5s7arm​v7l1 x 15286420.05. 02:05
r5s7sarm​v7l1 x 15284820.05. 02:06
r6s0x86_​642 x 10 x 2170013614020.05. 02:08
r6s1x86_​642 x 12000797820.05. 02:08
r6s2x86_​642 x 11667957620.05. 02:09
r6s3x86_​644 x 222003512020.05. 02:09
r6s4x86_​642 x 11100437620.05. 02:10
r6s5i6861 x 11500299220.05. 02:10
r6s6i6861 x 11600319120.05. 02:11
r6s7i6862 x 12300917620.05. 02:11
r6s8x86_​642 x 223001835620.05. 02:12
r7s0x86_​642 x 223001840020.05. 02:12
r7s1x86_​644 x 116001284020.05. 02:13
r7s2sarm​v7l4 x 1150072020.05. 02:13
r7s3arm​v6l1 x 1700520.05. 02:14
r7s3sarm​v7l4 x 1140035620.05. 02:16
r7s4arm​v7l1 x 153634820.05. 02:17
r7s4sarm​v7l4 x 11500108020.05. 02:18
r7s5i6861 x 11300259320.05. 02:18
r7s6arm​v7l1 x 1100039828.02. 14:10
r7s7x86_​644 x 116001276720.05. 02:19
r7s7sx86_​642 x 223001844820.05. 02:19
r7s8arm​v7l1 x 1100099520.05. 02:20
r7s8sarm​v7l1 x 1100079620.05. 02:21
r8s0x86_​642 x 223001840020.05. 02:22
r8s1i5861 x 130060120.05. 02:22
r8s2x86_​642 x 221001676020.05. 02:23
r8s2sx86_​642 x 221001676020.05. 02:24
r8s3x86_​644 x 126672127620.05. 02:24
r8s4x86_​644 x 216002880020.05. 02:25
r8s4sx86_​644 x 216002880020.05. 02:25
r8s5i6864 x 234005440020.05. 02:27
r8s6arm​v7l1 x 150049820.05. 02:28
r8s7x86_​642 x 127001077620.05. 02:28
r8s7sx86_​642 x 133001324820.05. 02:29
r8s8x86_​642 x 11300514420.05. 02:29
r9s0x86_​642 x 223001839620.05. 02:30
r9s1x86_​642 x 12000399220.05. 02:30
r9s1sarm​v7l1 x 1125022.07. 09:38
r9s2x86_​644 x 116001274820.05. 02:31
r9s3x86_​644 x 116001274820.05. 02:31
r9s3sx86_​644 x 130002400020.05. 02:32
r9s4i6861 x 21000398820.05. 02:32
r9s4sx86_​642 x 11333534720.05. 02:33
r9s5x86_​642 x 127001077620.05. 02:33
r9s5sx86_​642 x 135001399820.05. 02:34
r9s6x86_​642 x 230002394420.05. 02:34
r9s7arm​v7l2 x 11000020.05. 02:35
r9s8arm​v7l1 x 160059725.06. 02:14
r9s8sarm​v7l1 x 180079620.05. 02:36
ras0x86_​642 x 223001841620.05. 02:36
ras1i6861 x 11400279920.05. 02:37
ras2x86_​642 x 11067426620.05. 02:37
ras3aarch​648 x 12000400007.11. 14:20
ras3sarm​v7l8 x 11300/200084025.11. 02:17
ras4arm​v7l1 x 150039820.05. 02:38
ras4sarm​v7l1 x 160059707.02. 02:45
ras5arm​v7l2 x 110002418.05. 14:32
ras5sarm​v7l2 x 110002420.05. 02:39
ras6arm​v7l1 x 11000198720.05. 02:39
ras6sarm​v7l1 x 11000198720.05. 02:39
ras7ppc1 x 13966520.05. 02:40
ras8x86_​644 x 116001440020.05. 02:40
ras8sx86_​644 x 116001274820.05. 02:40
rbs0i6862 x 225001760020.05. 02:41
rbs1x86_​644 x 131002479620.05. 02:42
rbs2x86_​644 x 232005120020.05. 02:42
rbs2sx86_​641 x 13500020.05. 02:42
rbs3arm​v7l4 x 19962420.05. 02:43
rbs3sarm​v7l4 x 1140035620.05. 02:43
rbs4x86_​644 x 11200960020.05. 02:44
rbs4sx86_​644 x 116001274820.05. 02:44
rbs5i6864 x 24990819.05. 14:36
rbs5saarch​644 x 116006420.05. 02:45
rbs6x86_​644 x 119151532420.05. 02:45
rbs6sx86_​642 x 11333533220.05. 02:46
rbs7arm​v7l4 x 19961220.05. 02:47
rbs7sarm​v7l4 x 19962420.05. 02:47
rbs8arm​v7l2 x 1666265020.05. 02:48
rbs8sx86_​644 x 224003870420.05. 02:49
rcs0x86_​648 x 224007736820.05. 02:51
rcs1x86_​646 x 234678327120.05. 02:52
rcs2x86_​642 x 128001123220.05. 02:53
rcs3i6862 x 11400558820.05. 02:53
rcs3sx86_​644 x 233005269620.05. 02:54
rcs4x86_​642 x 11100437620.05. 02:56
rcs4sx86_​644 x 11100875220.05. 02:57
rcs5x86_​642 x 128001119820.05. 02:58
rcs5sx86_​642 x 128001119820.05. 03:00
rcs6x86_​644 x 235006399220.05. 03:02
rcs7x86_​642 x 218001440020.05. 03:03
rcs7sx86_​644 x 115001198020.05. 03:03
rcs8x86_​6416 x 2370021715220.05. 03:07
rcs8sx86_​644 x 233005280020.05. 03:08
rds0x86_​644 x 218003199207.03. 14:56
rds1x86_​644 x 119101532407.03. 14:56
rds2x86_​644 x 119101532407.03. 14:56
rds3x86_​644 x 119101532407.03. 14:57
rds4x86_​644 x 119101532407.03. 14:57
rds5x86_​644 x 116001274807.03. 14:58
rds6x86_​644 x 116001274807.03. 14:58
rds7x86_​644 x 116001274807.03. 14:59
rds8x86_​644 x 116001274807.03. 14:59
res0x86_​644 x 218003199220.05. 03:09
res1x86_​644 x 222002880019.01. 14:53
res2x86_​644 x 222002880019.01. 14:53
res3x86_​644 x 119001505218.05. 14:58
res4x86_​644 x 119001505220.05. 03:10
res5x86_​642 x 222001920019.01. 14:55
res6x86_​642 x 222001920019.01. 14:55
res7x86_​644 x 119001505220.05. 03:12
res8x86_​644 x 119001505220.05. 03:13
 

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