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2022-01-23 - 09:57

Intel(R) Xeon(R) CPU E3-1220L V2 @ 2.30GHz, Linux 4.19.8-rt6 (Profile)

Latency plot of system in rack #4, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack4slot0.osadl.org (updated Sun Jan 23, 2022 00:44:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2636621450,3sleep12465599cyclictest23:50:371
792521400,0sleep10-21swapper/121:39:501
2274421050,0sleep10-21swapper/100:03:281
159022830,0sleep20-21swapper/222:23:412
62172800,0sleep20-21swapper/221:36:202
40792740,0sleep10-21swapper/122:38:591
31002740,0sleep20-21swapper/223:08:382
117232730,1sleep2321ktimersoftd/221:56:432
117232730,1sleep2321ktimersoftd/221:56:432
313202720,0sleep10-21swapper/123:11:291
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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