You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-12 - 09:11

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #4, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot1s.osadl.org (updated Fri Jun 12, 2026 00:44:19)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
324852640,2sleep131810-21/usr/sbin/munin23:33:081
324852640,2sleep131810-21/usr/sbin/munin23:33:081
228312620,3chrt0-21swapper/000:33:120
228312620,3chrt0-21swapper/000:33:120
228312620,3chrt0-21swapper/000:33:120
6182550,8sleep0621-21needreboot22:08:080
6182550,8sleep0621-21needreboot22:08:080
6182550,8sleep0621-21needreboot22:08:080
32115995549,3cyclictest31264-21kworker/u10:1-nfsiod00:02:550
32115995549,3cyclictest31264-21kworker/u10:1-nfsiod00:02:550
32115995549,3cyclictest31264-21kworker/u10:1-nfsiod00:02:550
32123995140,5cyclictest0-21swapper/100:02:581
32123995140,5cyclictest0-21swapper/100:02:581
32123995140,5cyclictest0-21swapper/100:02:581
57612500,2sleep05764-21fschecks_count22:23:030
57612500,2sleep05764-21fschecks_count22:23:030
181282470,3sleep00-21swapper/000:22:590
181282470,3sleep00-21swapper/000:22:590
255872460,2chrt0-21swapper/021:48:060
255872460,2chrt0-21swapper/021:48:060
255872460,2chrt0-21swapper/021:48:060
244892460,2chrt0-21swapper/323:13:033
244892460,2chrt0-21swapper/323:13:033
32115994440,2cyclictest0-21swapper/000:03:110
32115994440,2cyclictest0-21swapper/000:03:110
32115994013,5cyclictest201rcuc/000:24:460
32115994013,5cyclictest201rcuc/000:24:460
246052380,2sleep024606-21switchtime20:18:130
246052380,2sleep024606-21switchtime20:18:130
153432380,2sleep115373-21readlink21:22:511
153432380,2sleep115373-21readlink21:22:511
32123993731,4cyclictest32091-21cyclictest20:43:051
32123993731,4cyclictest32091-21cyclictest20:43:051
3212399372,27cyclictest11677-21sed00:03:151
3212399372,27cyclictest11677-21sed00:03:151
201062370,3sleep00-21swapper/020:08:040
201062370,3sleep00-21swapper/020:08:040
201062370,3sleep00-21swapper/020:08:040
39282360,3sleep20-21swapper/223:43:132
39282360,3sleep20-21swapper/223:43:132
32115993630,4cyclictest572-21cups-browsed21:08:100
32115993630,4cyclictest572-21cups-browsed21:08:100
32115993630,4cyclictest201rcuc/023:36:340
32115993630,4cyclictest201rcuc/023:36:340
32115993620,4cyclictest90-1pr/ttyS023:12:160
32115993620,4cyclictest90-1pr/ttyS023:12:160
32115993617,5cyclictest201rcuc/023:54:030
32115993617,5cyclictest201rcuc/023:54:030
32115993617,5cyclictest201rcuc/023:54:030
38892350,2sleep13925-21proc_pri23:43:131
38892350,2sleep13925-21proc_pri23:43:131
32115993428,4cyclictest20933-21sed23:03:040
32115993428,4cyclictest20933-21sed23:03:040
32115993427,5cyclictest32091-21cyclictest23:48:040
32123993323,8cyclictest22464-21ntp_kernel_pll_20:13:091
32123993323,8cyclictest22464-21ntp_kernel_pll_20:13:091
3211599339,4cyclictest201rcuc/022:17:570
3211599339,4cyclictest201rcuc/022:17:570
32115993324,6cyclictest7975-21latency_hist21:02:570
32115993324,6cyclictest7975-21latency_hist21:02:570
111202330,3chrt0-21swapper/319:43:073
111202330,3chrt0-21swapper/319:43:073
32123993226,4cyclictest1614-21latency_hist22:12:511
32123993226,4cyclictest1614-21latency_hist22:12:511
32123993226,4cyclictest1614-21latency_hist22:12:511
3211599326,6cyclictest201rcuc/020:06:330
3211599326,6cyclictest201rcuc/020:06:330
32115993225,5cyclictest4156-21threads23:43:150
32115993225,5cyclictest24771-21threads00:38:150
32115993225,5cyclictest24771-21threads00:38:150
32115993225,5cyclictest24771-21threads00:38:150
32115993224,6cyclictest8287-21cut21:03:030
32115993224,6cyclictest8287-21cut21:03:030
32123993125,4cyclictest1346-21avahi-daemon20:03:111
32123993125,4cyclictest1346-21avahi-daemon20:03:111
3211599319,4cyclictest201rcuc/020:35:550
3211599319,4cyclictest201rcuc/020:35:550
32115993124,5cyclictest32091-21cyclictest21:44:430
32115993124,5cyclictest32091-21cyclictest21:44:430
32115993124,5cyclictest32091-21cyclictest21:44:430
32115993117,4cyclictest90-1pr/ttyS023:51:160
32115993117,4cyclictest90-1pr/ttyS023:51:160
32115993117,4cyclictest90-1pr/ttyS023:51:160
97432300,1sleep19855-21/usr/sbin/munin22:33:061
97432300,1sleep19855-21/usr/sbin/munin22:33:061
32123993024,4cyclictest13461-21gltestperf22:43:061
32123993024,4cyclictest13461-21gltestperf22:43:061
32123993024,4cyclictest13461-21gltestperf22:43:061
32123993021,7cyclictest27081-21gltestperf21:53:041
3211599304,4cyclictest171ktimers/021:55:310
3211599304,4cyclictest171ktimers/021:55:310
32115993026,3cyclictest28097-21ntp_offset20:28:080
32115993026,3cyclictest28097-21ntp_offset20:28:080
32115993016,3cyclictest90-1pr/ttyS020:26:120
32115993016,3cyclictest90-1pr/ttyS020:26:120
3214299291,23cyclictest10532-21taskset00:02:563
3214299291,23cyclictest10532-21taskset00:02:563
3214299291,23cyclictest10532-21taskset00:02:563
3212399292,8cyclictest246062switchtime20:18:131
3212399292,8cyclictest246062switchtime20:18:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional