You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-18 - 15:31
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #4, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot1s.osadl.org (updated Wed Feb 18, 2026 12:44:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2051521140,2chrt20514-21df08:41:141
2051521140,2chrt20514-21df08:41:141
2051521140,2chrt20514-21df08:41:141
2271721130,2chrt19338-21cyclictest10:11:271
2271721130,2chrt19338-21cyclictest10:11:271
69442900,1sleep00-21swapper/008:03:540
69442900,1sleep00-21swapper/008:03:540
316212870,2chrt31618-21grep07:41:270
316212870,2chrt31618-21grep07:41:270
59402670,3sleep30-21swapper/309:26:263
59402670,3sleep30-21swapper/309:26:263
95762650,2sleep00-21swapper/012:31:160
95762650,2sleep00-21swapper/012:31:160
23992630,2chrt0-21swapper/207:51:222
215242540,1sleep00-21swapper/008:41:250
215242540,1sleep00-21swapper/008:41:250
199952510,4sleep20-21swapper/211:31:242
199952510,4sleep20-21swapper/211:31:242
30822490,3sleep30-21swapper/310:46:223
116992480,3sleep011702-21latency_hist11:11:120
116992480,3sleep011702-21latency_hist11:11:120
305072450,2sleep20-21swapper/209:06:232
305072450,2sleep20-21swapper/209:06:232
59382440,3sleep20-21swapper/208:01:192
59382440,3sleep20-21swapper/208:01:192
68772430,4sleep20-21swapper/210:56:222
68772430,4sleep20-21swapper/210:56:222
268282430,2sleep00-21swapper/011:51:170
268282430,2sleep00-21swapper/011:51:170
190472420,3chrt0-21swapper/208:36:202
190472420,3chrt0-21swapper/208:36:202
190472420,3chrt0-21swapper/208:36:202
147272420,2sleep014857-21sort09:51:210
147272420,2sleep014857-21sort09:51:210
147272420,2sleep014857-21sort09:51:210
291292380,4sleep20-21swapper/211:56:202
291292380,4sleep20-21swapper/211:56:202
215012370,3sleep30-21swapper/310:11:053
215012370,3sleep30-21swapper/310:11:053
19341993731,4cyclictest17727-21latency_hist10:01:041
19341993731,4cyclictest17727-21latency_hist10:01:041
18012370,3chrt0-21swapper/212:11:122
18012370,3chrt0-21swapper/212:11:122
223042360,3sleep20-21swapper/211:36:262
223042360,3sleep20-21swapper/211:36:262
223042360,3sleep20-21swapper/211:36:262
223042360,3sleep20-21swapper/211:36:262
19341993529,4cyclictest12138-21cron09:46:041
19341993529,4cyclictest12138-21cron09:46:041
19341993529,4cyclictest10854-21idleruntime-cro08:16:051
19341993529,4cyclictest10854-21idleruntime-cro08:16:051
186302350,3sleep30-21swapper/310:01:203
186302350,3sleep30-21swapper/310:01:203
19341993425,7cyclictest23304-21gltestperf11:41:171
19341993424,8cyclictest6889-21sshd08:03:121
19341993424,8cyclictest6889-21sshd08:03:121
250522330,3sleep20-21swapper/207:26:172
19341993328,3cyclictest1109-21unixbench_singl07:46:291
19341993328,3cyclictest1109-21unixbench_singl07:46:291
19341993326,5cyclictest27109-21latency_hist10:26:041
19341993326,5cyclictest27109-21latency_hist10:26:041
113142330,3chrt0-21swapper/208:16:182
113142330,3chrt0-21swapper/208:16:182
19341993226,4cyclictest30157-21sendmail07:41:041
19341993226,4cyclictest30157-21sendmail07:41:041
19341993219,11cyclictest28021-21df_inode09:01:171
19340993226,4cyclictest30279-21wc12:01:050
19340993226,4cyclictest30279-21wc12:01:050
19340993225,5cyclictest1642-21latency_hist12:11:040
19340993225,5cyclictest1642-21latency_hist12:11:040
19340993225,5cyclictest15077-21fschecks_time08:26:180
141552320,3chrt0-21swapper/309:51:113
19341993126,4cyclictest29297-21ntp_kernel_err11:56:231
19341993126,4cyclictest29297-21ntp_kernel_err11:56:231
19340993127,3cyclictest19338-21cyclictest10:03:120
19340993127,3cyclictest19338-21cyclictest10:03:120
19340993125,5cyclictest3634-21latency_hist12:16:100
19340993123,6cyclictest17582-21fschecks_time11:26:180
19340993123,6cyclictest17582-21fschecks_time11:26:180
19341993025,3cyclictest8875-21kworker/u9:3-rpciod08:21:051
19341993025,3cyclictest8875-21kworker/u9:3-rpciod08:21:051
19340993025,4cyclictest1346-21avahi-daemon10:41:260
19340993025,4cyclictest1346-21avahi-daemon10:41:260
19340993023,6cyclictest3619-21unixbench_multi10:46:280
19340993023,5cyclictest23352-21timerandwakeup08:46:290
19340993023,5cyclictest18777-21cut08:36:180
19340993023,5cyclictest18777-21cut08:36:180
19340993023,5cyclictest18777-21cut08:36:180
1934399291,10cyclictest6225-21chrt09:27:102
1934399291,10cyclictest6225-21chrt09:27:102
19341992924,4cyclictest6348-21ntp_kernel_pll_12:21:231
19341992924,4cyclictest6348-21ntp_kernel_pll_12:21:231
19341992923,4cyclictest23142-21fschecks_time07:21:171
19341992923,4cyclictest19974-21fschecks_count10:06:181
19341992923,4cyclictest19974-21fschecks_count10:06:181
19341992923,4cyclictest0-21swapper/111:21:051
19341992923,4cyclictest0-21swapper/111:21:051
19341992922,5cyclictest595-21sshd11:13:121
19341992922,5cyclictest595-21sshd11:13:121
19341992922,5cyclictest2474-21sshd09:17:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional