You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-12 - 12:02

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #4, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot1s.osadl.org (updated Tue May 12, 2026 00:44:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
553521100,1sleep10-21swapper/121:37:381
124262950,5sleep012429-21head20:27:460
124262950,5sleep012429-21head20:27:460
306192940,2chrt30618-21awk22:42:450
306192940,2chrt30618-21awk22:42:450
306192940,2chrt30618-21awk22:42:450
256372820,3chrt0-21swapper/023:57:390
256372820,3chrt0-21swapper/023:57:390
318572780,3sleep131858-21sshd19:53:581
318572780,3sleep131858-21sshd19:53:581
255312620,3sleep30-21swapper/323:57:393
255312620,3sleep30-21swapper/323:57:393
110672590,2chrt281ktimers/120:27:271
110672590,2chrt281ktimers/120:27:271
110672590,2chrt281ktimers/120:27:271
211122580,2sleep00-21swapper/020:52:400
211122580,2sleep00-21swapper/020:52:400
187542570,2sleep118755-21cut20:47:331
38142530,3sleep10-21swapper/121:32:391
293652530,3sleep10-21swapper/122:42:301
293652530,3sleep10-21swapper/122:42:301
178552500,3sleep20-21swapper/222:11:002
178552500,3sleep20-21swapper/222:11:002
76172460,2sleep30-21swapper/321:42:423
76172460,2sleep30-21swapper/321:42:423
76172460,2sleep30-21swapper/321:42:423
216152450,3chrt0-21swapper/320:52:463
216152450,3chrt0-21swapper/320:52:463
98332440,3sleep30-21swapper/321:47:463
98332440,3sleep30-21swapper/321:47:463
271802440,3sleep20-21swapper/200:02:352
271802440,3sleep20-21swapper/200:02:352
271802440,3sleep20-21swapper/200:02:352
319772430,4sleep20-21swapper/221:22:352
319772430,4sleep20-21swapper/221:22:352
175772430,3sleep30-21swapper/320:42:423
175772430,3sleep30-21swapper/320:42:423
262582420,2sleep20-21swapper/222:32:382
262582420,2sleep20-21swapper/222:32:382
183022410,2sleep118301-21df_inode22:12:351
183022410,2sleep118301-21df_inode22:12:351
1566599393,29cyclictest27372-21/usr/sbin/munin00:02:360
1566599393,29cyclictest27372-21/usr/sbin/munin00:02:360
1566599393,29cyclictest27372-21/usr/sbin/munin00:02:360
200162350,4sleep30-21swapper/319:22:413
15666993428,4cyclictest23598-21latency_hist22:27:231
15666993428,4cyclictest23598-21latency_hist22:27:231
15666993425,7cyclictest0-21swapper/120:17:461
15666993425,7cyclictest0-21swapper/120:17:461
15665993427,5cyclictest27322-21idleruntime-cro22:37:230
15665993427,5cyclictest27322-21idleruntime-cro22:37:230
127432340,1sleep3431rcuc/323:22:403
127432340,1sleep3431rcuc/323:22:403
15666993327,4cyclictest17986-21latency_hist22:12:221
15666993327,4cyclictest17986-21latency_hist22:12:221
15666993325,6cyclictest8684-21latency_hist21:47:281
15666993325,6cyclictest8684-21latency_hist21:47:281
15666993325,6cyclictest8684-21latency_hist21:47:281
15666993325,6cyclictest26813-21latency_hist00:02:251
15666993325,6cyclictest26813-21latency_hist00:02:251
15666993325,6cyclictest16453-21netstat23:32:411
15666993324,7cyclictest1796-21kernelversion21:27:381
15666993324,7cyclictest1796-21kernelversion21:27:381
15666993324,7cyclictest1796-21kernelversion21:27:381
1566699331,29cyclictest27519-21sed00:02:381
1566699331,29cyclictest27519-21sed00:02:381
1566699331,29cyclictest27519-21sed00:02:381
31382320,2sleep115664-21cyclictest22:57:381
31382320,2sleep115664-21cyclictest22:57:381
274192320,3sleep30-21swapper/319:42:393
274192320,3sleep30-21swapper/319:42:393
15666993226,4cyclictest2402-21latency_hist22:57:241
15666993226,4cyclictest2402-21latency_hist22:57:241
15666993127,3cyclictest27863-21cron21:12:221
15666993127,3cyclictest27863-21cron21:12:221
15666993124,5cyclictest547-21rs:main1
15666993124,5cyclictest547-21rs:main1
15666993124,5cyclictest547-21rs:main1
15666993124,5cyclictest22371-21threads23:47:461
15666993124,5cyclictest22371-21threads23:47:461
15666993122,7cyclictest28346-21cut21:12:361
187822300,3sleep018787-21unixbench_multi23:37:450
1566899301,22cyclictest26842-21taskset00:02:272
1566899301,22cyclictest26842-21taskset00:02:272
15666993023,5cyclictest6015-21sshd23:06:001
15666993023,5cyclictest6015-21sshd23:06:001
15666993023,5cyclictest6015-21sshd23:06:001
15666993023,5cyclictest11710-21sshd23:22:001
15666993023,5cyclictest11710-21sshd23:22:001
15666993023,5cyclictest0-21swapper/120:52:231
15666993023,5cyclictest0-21swapper/120:52:231
15666993021,7cyclictest25606-21latency_hist22:32:311
15666993021,7cyclictest25606-21latency_hist22:32:311
15665993024,5cyclictest28396-21cron19:47:220
15665993024,5cyclictest28396-21cron19:47:220
15665993023,5cyclictest29670-21timerandwakeup19:47:460
15665993023,5cyclictest29670-21timerandwakeup19:47:460
15665993023,5cyclictest11756-21latency_hist23:22:230
15665993023,5cyclictest11756-21latency_hist23:22:230
15665993016,12cyclictest0-21swapper/021:22:360
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional