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2026-01-20 - 23:40
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #4, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack4slot1s.osadl.org (updated Tue Jan 20, 2026 12:44:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1115721450,2sleep30-21swapper/310:05:533
1115721450,2sleep30-21swapper/310:05:533
1781221070,10sleep0171ktimers/011:50:500
1781221070,10sleep0171ktimers/011:50:500
1611221010,2chrt16117-21netstat07:25:551
1611221010,2chrt16117-21netstat07:25:551
87382940,2sleep010135-21cyclictest11:25:580
87382940,2sleep010135-21cyclictest11:25:580
223992900,3sleep30-21swapper/309:10:503
223992900,3sleep30-21swapper/309:10:503
313982860,4sleep30-21swapper/312:25:593
313982860,4sleep30-21swapper/312:25:593
45422720,2sleep00-21swapper/008:20:580
45422720,2sleep00-21swapper/008:20:580
221082660,3chrt0-21swapper/309:10:373
221082660,3chrt0-21swapper/309:10:373
212562650,2sleep30-21swapper/312:00:503
212562650,2sleep30-21swapper/312:00:503
67282530,2sleep1271rcuc/109:55:461
135392510,3sleep30-21swapper/310:11:003
135392510,3sleep30-21swapper/310:11:003
16542500,2sleep30-21swapper/312:35:403
173432490,4sleep30-21swapper/308:55:543
173432490,4sleep30-21swapper/308:55:543
173432490,4sleep30-21swapper/308:55:543
31132480,2sleep03116-21sort09:45:480
31132480,2sleep03116-21sort09:45:480
31132480,2sleep03116-21sort09:45:480
68302470,3sleep30-21swapper/311:20:543
68302470,3sleep30-21swapper/311:20:543
327252470,2sleep032728-21ls09:35:590
327252470,2sleep032728-21ls09:35:590
327252470,2sleep032728-21ls09:35:590
200932460,3sleep20-21swapper/207:35:582
200932460,3sleep20-21swapper/207:35:582
162982450,3sleep00-21swapper/007:25:580
162982450,3sleep00-21swapper/007:25:580
252522430,3sleep20-21swapper/207:50:542
252522430,3sleep20-21swapper/207:50:542
127992430,3sleep20-21swapper/208:45:402
127992430,3sleep20-21swapper/208:45:402
10156994328,12cyclictest18821-21processes10:25:580
10156994328,12cyclictest18821-21processes10:25:580
20352410,3sleep00-21swapper/012:35:490
20352410,3sleep00-21swapper/012:35:490
20352410,3sleep00-21swapper/012:35:490
301072400,2sleep30-21swapper/310:55:583
301072400,2sleep30-21swapper/310:55:583
34982390,3sleep20-21swapper/212:40:372
34982390,3sleep20-21swapper/212:40:372
34982390,3sleep20-21swapper/212:40:372
10158993831,5cyclictest25818-21latency_hist09:20:371
10158993831,5cyclictest25818-21latency_hist09:20:371
315402370,2sleep031724-21/usr/sbin/munin12:26:010
315402370,2sleep031724-21/usr/sbin/munin12:26:010
254502370,3chrt0-21swapper/210:45:482
254502370,3chrt0-21swapper/210:45:482
10156993621,13cyclictest0-21swapper/008:15:500
10156993621,13cyclictest0-21swapper/008:15:500
72812340,3chrt0-21swapper/208:30:452
72812340,3chrt0-21swapper/208:30:452
10156993426,6cyclictest10135-21cyclictest09:35:380
10156993426,6cyclictest10135-21cyclictest09:35:380
10156993425,7cyclictest26485-21latency_hist12:15:380
10156993425,7cyclictest26485-21latency_hist12:15:380
43822330,2sleep04485-21fschecks_time11:15:500
43822330,2sleep04485-21fschecks_time11:15:500
10156993323,8cyclictest11323-21fschecks_time08:40:520
10156993323,8cyclictest11323-21fschecks_time08:40:520
10156993319,12cyclictest0-21swapper/009:50:520
10156993319,12cyclictest0-21swapper/009:50:520
109052323,4sleep111066-21grep11:30:591
109052323,4sleep111066-21grep11:30:591
10158993226,4cyclictest7106-21cron08:30:381
10158993226,4cyclictest7106-21cron08:30:381
10158993225,5cyclictest10135-21cyclictest08:55:541
10158993225,5cyclictest10135-21cyclictest08:55:541
10158993225,5cyclictest10135-21cyclictest08:55:541
10156993126,4cyclictest10135-21cyclictest08:36:260
10156993126,4cyclictest10135-21cyclictest08:36:260
10156993126,4cyclictest10135-21cyclictest08:36:260
10156993125,4cyclictest17224-21latency08:55:530
10156993125,4cyclictest17224-21latency08:55:530
10156993125,4cyclictest17224-21latency08:55:530
10156993124,5cyclictest16309-21cut10:20:520
10156993124,5cyclictest16309-21cut10:20:520
10156993123,6cyclictest7840-21kernelversion08:30:550
10156993123,6cyclictest7840-21kernelversion08:30:550
10156993123,6cyclictest7840-21kernelversion08:30:550
10156993123,6cyclictest29897-21ntp_kernel_pll_10:55:550
10156993123,6cyclictest29897-21ntp_kernel_pll_10:55:550
10156993123,6cyclictest10768-21cut10:05:490
10156993123,6cyclictest10768-21cut10:05:490
10156993123,5cyclictest20197-21latency_hist09:05:440
10156993123,5cyclictest20197-21latency_hist09:05:440
207922300,2chrt0-21swapper/209:05:502
207922300,2chrt0-21swapper/209:05:502
10158993024,5cyclictest22159-21latency_hist09:10:401
10158993024,5cyclictest22159-21latency_hist09:10:401
10158993024,4cyclictest3216-21proc_pri11:10:581
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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