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2025-11-18 - 02:33

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #4, slot #1

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack4slot1s.osadl.org (updated Tue Nov 18, 2025 00:44:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
304032900,3chrt0-21swapper/321:33:473
304032900,3chrt0-21swapper/321:33:473
209662790,3sleep30-21swapper/323:58:503
209662790,3sleep30-21swapper/323:58:503
34972770,3sleep20-21swapper/223:13:472
34972770,3sleep20-21swapper/223:13:472
75472760,3sleep07550-21kernelversion23:23:500
75472760,3sleep07550-21kernelversion23:23:500
322082760,3sleep00-21swapper/023:03:480
322082760,3sleep00-21swapper/023:03:480
128142730,4sleep20-21swapper/223:38:432
128142730,4sleep20-21swapper/223:38:432
272012710,3sleep30-21swapper/319:58:523
272012710,3sleep30-21swapper/319:58:523
142742660,1sleep00-21swapper/019:23:550
139682630,2sleep20-21swapper/220:48:552
9721996232,23cyclictest55150irq/47-eth021:33:430
9721996232,23cyclictest55150irq/47-eth021:33:430
4052610,3chrt0-21swapper/021:38:540
4052610,3chrt0-21swapper/021:38:540
192362590,2chrt0-21swapper/022:28:510
192362590,2chrt0-21swapper/022:28:510
309882580,3sleep00-21swapper/000:23:560
309882580,3sleep00-21swapper/000:23:560
9721995520,11cyclictest181rcu_preempt20:13:460
9721995520,11cyclictest181rcu_preempt20:13:460
275242530,1chrt0-21swapper/019:58:570
275242530,1chrt0-21swapper/019:58:570
220262530,2sleep20-21swapper/200:03:322
220262530,2sleep20-21swapper/200:03:322
972299523,36cyclictest22488-21chrt22:38:451
972299523,36cyclictest22488-21chrt22:38:451
253822520,3sleep20-21swapper/221:18:542
253822520,3sleep20-21swapper/221:18:542
972299504,10cyclictest181rcu_preempt23:08:461
156402480,2sleep30-21swapper/320:53:523
156402480,2sleep30-21swapper/320:53:523
972199476,6cyclictest171ktimers/019:38:440
972199474,40cyclictest201rcuc/020:33:440
265162470,2sleep30-21swapper/321:23:463
265162470,2sleep30-21swapper/321:23:463
139512470,1sleep3431rcuc/319:23:503
972199465,35cyclictest14728-21chrt23:43:480
972199465,35cyclictest14728-21chrt23:43:480
63182460,3sleep00-21swapper/021:53:580
63182460,3sleep00-21swapper/021:53:580
113622460,1sleep00-21swapper/022:08:490
972199454,7cyclictest171ktimers/019:48:460
972199454,7cyclictest171ktimers/019:48:460
166032450,4sleep30-21swapper/323:48:453
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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