You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-09-16 - 05:24
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot4.osadl.org (updated Mon Sep 16, 2024 00:51:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71720rcu_preempt0-21swapper/323:40:143
71720rcu_preempt0-21swapper/323:40:143
62922680chrt46050irq/122-QMan09:24:360
62922680chrt46050irq/122-QMan09:24:360
71650rcu_preempt0-21swapper/000:25:550
71650rcu_preempt0-21swapper/000:25:550
71650rcu_preempt0-21swapper/000:25:550
71640rcu_preempt0-21swapper/122:51:471
71640rcu_preempt0-21swapper/122:51:471
71640rcu_preempt0-21swapper/000:37:570
71640rcu_preempt0-21swapper/000:37:570
71620rcu_preempt0-21swapper/221:41:102
71620rcu_preempt0-21swapper/221:41:102
71620rcu_preempt0-21swapper/221:41:102
71620rcu_preempt0-21swapper/221:31:002
71620rcu_preempt0-21swapper/221:31:002
71620rcu_preempt0-21swapper/022:43:550
71620rcu_preempt0-21swapper/022:43:550
71600rcu_preempt0-21swapper/022:28:430
71600rcu_preempt0-21swapper/022:28:430
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional