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2024-12-10 - 22:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack4slot4.osadl.org (updated Tue Dec 10, 2024 12:52:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
71620rcu_preempt0-21swapper/009:58:480
71620rcu_preempt0-21swapper/009:58:480
71620rcu_preempt0-21swapper/009:58:480
71610rcu_preempt0-21swapper/309:40:583
71610rcu_preempt0-21swapper/309:40:583
71590rcu_preempt0-21swapper/112:05:141
71590rcu_preempt0-21swapper/112:05:141
71590rcu_preempt0-21swapper/010:28:500
71590rcu_preempt0-21swapper/010:28:500
71560rcu_preempt0-21swapper/211:23:372
71560rcu_preempt0-21swapper/211:23:372
71560rcu_preempt0-21swapper/211:23:372
71500rcu_preempt0-21swapper/212:18:492
71500rcu_preempt0-21swapper/212:18:492
71490rcu_preempt0-21swapper/309:35:343
71490rcu_preempt0-21swapper/309:35:343
71490rcu_preempt0-21swapper/309:35:343
46050490irq/122-QManpo1064-2109:24:360
46050490irq/122-QManpo1064-2109:24:360
71480rcu_preempt0-21swapper/209:37:552
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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