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2023-06-01 - 14:06

x86 Intel Xeon-E31220L @2200 MHz, Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #5, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot0.osadl.org (updated Thu Jun 01, 2023 12:44:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2448821210,4sleep3412199cyclictest09:05:313
2099221120,1sleep2412099cyclictest10:00:442
1668221110,4sleep1411899cyclictest11:20:551
3762210733,47sleep30-21swapper/307:07:293
3809210333,41sleep10-21swapper/107:08:031
81522940,1sleep08146-21sshd12:21:000
74302940,1sleep10-21swapper/111:55:501
242612910,2sleep224259-21sshd11:43:282
191052910,2sleep30-21swapper/309:42:143
66692900,1sleep10-21swapper/109:15:071
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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