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2024-10-03 - 21:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack5slot1.osadl.org (updated Thu Oct 03, 2024 12:44:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
840139166320,0EcMasterDemoSyn327-21md0_raid109:01:565
270563984100,0EcMasterDemoSyn0-21swapper/507:05:445
14723984100,0EcMasterDemoSyn0-21swapper/510:03:405
292943984080,0EcMasterDemoSyn0-21swapper/510:32:215
171763984060,0EcMasterDemoSyn0-21swapper/510:54:535
171763984060,0EcMasterDemoSyn0-21swapper/510:54:535
182943984040,0EcMasterDemoSyn0-21swapper/509:12:505
153673984040,0EcMasterDemoSyn0-21swapper/507:26:475
26163984030,0EcMasterDemoSyn0-21swapper/510:39:165
225713984020,0EcMasterDemoSyn0-21swapper/507:35:095
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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