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2022-10-04 - 03:05

x86 Intel Xeon E5-2650Lv2 @1700 MHz, Linux 4.18.7-rt5 (Profile)

Latency plot of system in rack #6, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack6slot0.osadl.org (updated Wed Sep 28, 2022 02:49:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2255499325320,2cyclictest0-21swapper/823:50:2638
2255499325320,2cyclictest0-21swapper/823:50:2638
2258299265258,3cyclictest714-21jbd2/sda1-800:00:2421
2258299265258,3cyclictest714-21jbd2/sda1-800:00:2421
2255799256248,4cyclictest4301-21CPU2
2255799256248,4cyclictest4301-21CPU2
2257999254248,4cyclictest4568-21cp23:47:1218
2257999254248,4cyclictest4568-21cp23:47:1118
2257999254246,5cyclictest1-21systemd21:25:0918
2257999254246,5cyclictest1-21systemd21:25:0918
2257999254245,6cyclictest7501-21env23:15:2018
2257999254245,6cyclictest7501-21env23:15:2018
2257999253234,10cyclictest0-21swapper/2523:01:3118
2257999253234,10cyclictest0-21swapper/2523:01:3018
2257999251245,4cyclictest0-21swapper/2523:42:1118
2257999251245,4cyclictest0-21swapper/2523:42:1018
2257999250242,6cyclictest0-21swapper/2521:10:3018
2257999250242,6cyclictest0-21swapper/2521:10:3018
2257999249242,5cyclictest0-21swapper/2521:16:1418
2257999249242,5cyclictest0-21swapper/2521:16:1418
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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