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2019-07-24 - 00:11

ARMv7 Processor rev 2 (v7l), Linux 4.9.47-rt37 (Profile)

Latency plot of system in rack #7, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Command line: cyclictest -l100000000 -m -n -a0 -t1 -p99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack7slot8.osadl.org (updated Tue Jul 23, 2019 12:46:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5732223934,55sleep00-21swapper/007:08:590
60319912028,46cyclictest20184-21diskmemload11:46:210
60319911841,32cyclictest2897-21ssh10:08:280
60319911838,36cyclictest20184-21diskmemload09:43:200
60319911827,47cyclictest20184-21diskmemload09:14:230
60319911745,26cyclictest20184-21diskmemload10:49:430
60319911726,47cyclictest20184-21diskmemload10:35:220
60319911626,47cyclictest20184-21diskmemload12:28:250
60319911544,26cyclictest20184-21diskmemload11:03:340
60319911527,45cyclictest20184-21diskmemload10:31:270
60319911527,45cyclictest20184-21diskmemload09:27:270
60319911442,28cyclictest20184-21diskmemload11:16:060
60319911438,31cyclictest20184-21diskmemload10:25:130
60319911428,27cyclictest27285-21ssh10:40:290
60319911426,43cyclictest20184-21diskmemload10:23:370
60319911339,28cyclictest20184-21diskmemload09:51:130
60319911339,27cyclictest20184-21diskmemload12:21:270
60319911336,31cyclictest9590-21rm12:33:410
60319911325,47cyclictest20184-21diskmemload10:03:550
60319911240,28cyclictest20184-21diskmemload11:29:490
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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