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2026-08-13 - 06:38

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #a, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot5s.osadl.org (updated Thu Aug 13, 2026 00:43:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
811140,0rcu_preempt19-21ksoftirqd/100:33:381
811030,0rcu_preempt19-21ksoftirqd/122:01:451
811000,0rcu_preempt31466-21kworker/1:020:15:041
81980,0rcu_preempt19-21ksoftirqd/121:20:211
81950,0rcu_preempt19-21ksoftirqd/123:45:311
81950,0rcu_preempt19-21ksoftirqd/123:22:271
81950,0rcu_preempt19-21ksoftirqd/121:37:041
81930,0rcu_preempt19-21ksoftirqd/123:56:551
81930,0rcu_preempt19-21ksoftirqd/123:56:551
81900,0rcu_preempt54-21kswapd022:08:521
81900,0rcu_preempt19-21ksoftirqd/123:10:101
81900,0rcu_preempt19-21ksoftirqd/100:27:421
81900,0rcu_preempt19-21ksoftirqd/100:14:101
81890,0rcu_preempt19-21ksoftirqd/122:20:041
81890,0rcu_preempt19-21ksoftirqd/121:43:401
81880,0rcu_preempt19-21ksoftirqd/122:57:321
81870,0rcu_preempt54-21kswapd021:17:171
81860,0rcu_preempt54-21kswapd021:31:481
81860,0rcu_preempt19-21ksoftirqd/122:13:351
81840,0rcu_preempt19-21ksoftirqd/123:43:431
81840,0rcu_preempt19-21ksoftirqd/119:50:041
81840,0rcu_preempt19-21ksoftirqd/100:06:571
81820,0rcu_preempt54-21kswapd022:29:351
81820,0rcu_preempt19-21ksoftirqd/121:47:501
81820,0rcu_preempt19-21ksoftirqd/120:00:091
81810,0rcu_preempt19-21ksoftirqd/120:31:471
81810,0rcu_preempt0-21swapper/122:51:071
81800,0rcu_preempt836-21rngd21:52:371
81800,0rcu_preempt19-21ksoftirqd/119:30:321
81780,0rcu_preempt19-21ksoftirqd/122:30:051
81780,0rcu_preempt19-21ksoftirqd/100:34:591
81770,0rcu_preempt19-21ksoftirqd/123:30:531
81740,0rcu_preempt19-21ksoftirqd/122:36:081
81720,0rcu_preempt19-21ksoftirqd/122:45:551
81720,0rcu_preempt19-21ksoftirqd/122:39:521
81720,0rcu_preempt0-21swapper/123:16:581
213292720,0chrt9950irq/345-484840023:44:180
81710,0rcu_preempt54-21kswapd000:23:090
81710,0rcu_preempt3-21ksoftirqd/023:20:300
81710,0rcu_preempt3-21ksoftirqd/022:59:470
81710,0rcu_preempt19-21ksoftirqd/100:01:451
2398499718,0cyclictest31307-21ssh22:15:090
81690,0rcu_preempt19-21ksoftirqd/120:40:011
81690,0rcu_preempt19-21ksoftirqd/119:35:211
81680,0rcu_preempt3-21ksoftirqd/022:27:530
81680,0rcu_preempt19-21ksoftirqd/123:01:291
81680,0rcu_preempt19-21ksoftirqd/120:47:401
81680,0rcu_preempt19-21ksoftirqd/120:10:161
81670,0rcu_preempt19-21ksoftirqd/123:54:411
81670,0rcu_preempt19-21ksoftirqd/121:14:271
81660,0rcu_preempt19-21ksoftirqd/121:26:261
81650,0rcu_preempt19-21ksoftirqd/122:17:111
81650,0rcu_preempt19-21ksoftirqd/121:57:101
81650,0rcu_preempt19-21ksoftirqd/120:59:311
23984996510,0cyclictest20542-1kworker/0:1H21:36:080
81640,0rcu_preempt54-21kswapd021:55:050
81640,0rcu_preempt3-21ksoftirqd/022:31:150
81640,0rcu_preempt19-21ksoftirqd/123:27:301
81640,0rcu_preempt19-21ksoftirqd/119:29:261
81640,0rcu_preempt19-21ksoftirqd/100:15:121
81640,0rcu_preempt19-21ksoftirqd/100:15:121
2398499648,0cyclictest2987-1kworker/0:3H21:50:290
81630,0rcu_preempt19-21ksoftirqd/123:35:211
81610,0rcu_preempt0-21swapper/100:23:541
81600,0rcu_preempt19-21ksoftirqd/120:29:301
81590,0rcu_preempt836-21rngd21:05:040
81590,0rcu_preempt19-21ksoftirqd/121:00:091
81580,0rcu_preempt19-21ksoftirqd/121:05:031
81570,0rcu_preempt3-21ksoftirqd/022:10:540
81570,0rcu_preempt19-21ksoftirqd/120:50:031
81570,0rcu_preempt19-21ksoftirqd/120:08:021
81570,0rcu_preempt19-21ksoftirqd/119:10:051
81560,0rcu_preempt19-21ksoftirqd/119:40:271
81550,0rcu_preempt19-21ksoftirqd/120:20:011
81550,0rcu_preempt19-21ksoftirqd/119:58:541
81540,0rcu_preempt19-21ksoftirqd/123:05:141
81530,0rcu_preempt19-21ksoftirqd/120:35:141
81530,0rcu_preempt19-21ksoftirqd/119:15:131
81520,0rcu_preempt30948-21diskmemload21:15:050
10050510,0irq/346-4848400836-21rngd21:30:300
10050510,0irq/346-484840010648-1kworker/0:1H21:24:010
10050500,0irq/346-4848400836-21rngd22:21:340
81490,0rcu_preempt19-21ksoftirqd/119:20:171
81480,0rcu_preempt19-21ksoftirqd/119:49:211
9950470,0irq/345-484840010646-1kworker/0:0H21:26:100
81470,0rcu_preempt7847-21meminfo23:30:090
81470,0rcu_preempt3-21ksoftirqd/019:59:470
81470,0rcu_preempt3-21ksoftirqd/019:05:020
81470,0rcu_preempt3-21ksoftirqd/019:05:020
81470,0rcu_preempt30948-21diskmemload23:55:110
81470,0rcu_preempt30948-21diskmemload23:55:110
10050470,0irq/346-48484000-21swapper/023:11:560
81460,0rcu_preempt3-21ksoftirqd/000:15:040
81460,0rcu_preempt3-21ksoftirqd/000:15:040
81460,0rcu_preempt19-21ksoftirqd/119:05:041
81460,0rcu_preempt19-21ksoftirqd/119:05:041
2398499463,0cyclictest0-21swapper/023:19:280
81450,0rcu_preempt3-21ksoftirqd/023:04:070
81450,0rcu_preempt3-21ksoftirqd/000:34:590
81450,0rcu_preempt3-21ksoftirqd/000:30:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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