You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-14 - 05:33
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #a, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  TI
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot5s.osadl.org (updated Sat Feb 14, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
81700,0rcu_preempt3-21ksoftirqd/022:38:590
81700,0rcu_preempt3-21ksoftirqd/000:00:020
81670,0rcu_preempt3-21ksoftirqd/021:44:070
81640,0rcu_preempt19-21ksoftirqd/122:24:491
81640,0rcu_preempt19-21ksoftirqd/120:44:441
81630,0rcu_preempt3-21ksoftirqd/021:37:140
81630,0rcu_preempt3-21ksoftirqd/021:37:140
257932610,0chrt10050irq/346-484840019:37:590
81600,0rcu_preempt19-21ksoftirqd/100:34:471
238872600,0chrt10050irq/346-484840019:30:080
81590,0rcu_preempt3-21ksoftirqd/021:52:530
81590,0rcu_preempt20128-21kworker/0:221:44:380
223332590,0chrt10050irq/346-484840019:26:030
209462590,0chrt10050irq/346-484840019:23:420
81580,0rcu_preempt19-21ksoftirqd/122:00:291
81570,0rcu_preempt19-21ksoftirqd/123:19:451
81570,0rcu_preempt19-21ksoftirqd/122:40:151
81570,0rcu_preempt0-21swapper/023:19:070
10050570,0irq/346-484840054-21kswapd020:19:400
81560,0rcu_preempt19-21ksoftirqd/123:00:561
81560,0rcu_preempt19-21ksoftirqd/122:54:091
10050560,0irq/346-484840054-21kswapd023:19:400
10050560,0irq/346-484840017162-1kworker/0:3H22:08:320
81550,0rcu_preempt3-21ksoftirqd/022:46:580
81550,0rcu_preempt3-21ksoftirqd/000:35:450
81550,0rcu_preempt3-21ksoftirqd/000:09:370
81550,0rcu_preempt3-21ksoftirqd/000:04:450
81540,0rcu_preempt3-21ksoftirqd/019:04:530
81540,0rcu_preempt19-21ksoftirqd/121:49:431
10050540,0irq/346-484840026097-1kworker/0:1H21:19:400
9950530,0irq/345-4848400181ktimersoftd/121:21:001
81530,0rcu_preempt4927-21kworker/0:121:14:410
81530,0rcu_preempt3-21ksoftirqd/021:09:390
81530,0rcu_preempt3-21ksoftirqd/020:54:530
10050530,0irq/346-484840017440-1kworker/0:3H22:39:410
81520,0rcu_preempt3-21ksoftirqd/023:36:040
81520,0rcu_preempt3-21ksoftirqd/022:30:070
81520,0rcu_preempt3-21ksoftirqd/022:27:390
81520,0rcu_preempt0-21swapper/122:48:391
81520,0rcu_preempt0-21swapper/119:29:141
10050520,0irq/346-48484000-21swapper/022:49:290
81510,0rcu_preempt3-21ksoftirqd/023:04:540
81510,0rcu_preempt3-21ksoftirqd/019:59:270
81510,0rcu_preempt31321-21apt-get00:29:380
81510,0rcu_preempt19-21ksoftirqd/119:59:281
81510,0rcu_preempt11365-21apt-get21:29:370
10050510,0irq/346-48484000-21swapper/021:24:530
81500,0rcu_preempt3-21ksoftirqd/023:29:500
81500,0rcu_preempt3-21ksoftirqd/023:29:500
81500,0rcu_preempt3-21ksoftirqd/022:09:280
81500,0rcu_preempt3-21ksoftirqd/020:26:280
81500,0rcu_preempt3-21ksoftirqd/000:24:530
10050500,0irq/346-484840054-21kswapd021:59:380
81490,0rcu_preempt3-21ksoftirqd/023:54:530
81490,0rcu_preempt3-21ksoftirqd/021:03:000
81490,0rcu_preempt3-21ksoftirqd/020:05:100
81490,0rcu_preempt19-21ksoftirqd/121:29:461
81490,0rcu_preempt19-21ksoftirqd/121:09:371
81490,0rcu_preempt19-21ksoftirqd/120:04:511
10050490,0irq/346-4848400851-21rngd22:57:010
10050490,0irq/346-484840054-21kswapd000:19:350
81480,0rcu_preempt19-21ksoftirqd/119:04:381
81480,0rcu_preempt19-21ksoftirqd/100:19:511
81480,0rcu_preempt14192-21grep23:39:551
10050480,0irq/346-484840054-21kswapd020:39:410
10050480,0irq/346-484840032398-21ssh23:25:540
10050480,0irq/346-48484003-21ksoftirqd/019:39:310
81470,0rcu_preempt3-21ksoftirqd/023:44:380
81470,0rcu_preempt3-21ksoftirqd/022:24:270
81470,0rcu_preempt3-21ksoftirqd/022:14:370
81470,0rcu_preempt3-21ksoftirqd/021:55:430
81470,0rcu_preempt3-21ksoftirqd/021:55:430
81470,0rcu_preempt3-21ksoftirqd/020:49:530
81470,0rcu_preempt3-21ksoftirqd/020:14:350
81470,0rcu_preempt3-21ksoftirqd/020:10:150
81470,0rcu_preempt3-21ksoftirqd/020:02:400
81470,0rcu_preempt3-21ksoftirqd/000:14:540
81470,0rcu_preempt19-21ksoftirqd/123:14:131
81470,0rcu_preempt19-21ksoftirqd/122:36:411
81470,0rcu_preempt19-21ksoftirqd/120:19:481
81470,0rcu_preempt19-21ksoftirqd/120:14:401
81470,0rcu_preempt19-21ksoftirqd/120:01:021
10050470,0irq/346-48484009572-21ssh22:31:141
81460,0rcu_preempt3-21ksoftirqd/023:39:400
81460,0rcu_preempt3-21ksoftirqd/020:34:520
81460,0rcu_preempt3-21ksoftirqd/020:34:520
81460,0rcu_preempt3-21ksoftirqd/020:29:380
81460,0rcu_preempt19-21ksoftirqd/121:44:501
81460,0rcu_preempt19-21ksoftirqd/120:09:431
81450,0rcu_preempt3-21ksoftirqd/023:11:420
81450,0rcu_preempt21942-21php-cgi21:04:450
81450,0rcu_preempt19-21ksoftirqd/121:14:471
81450,0rcu_preempt19-21ksoftirqd/119:41:301
81450,0rcu_preempt19-21ksoftirqd/119:19:421
81450,0rcu_preempt19-21ksoftirqd/100:15:071
10050450,0irq/346-484840054-21kswapd022:59:390
10050450,0irq/346-484840018129-21munin-node0
81440,0rcu_preempt54-21kswapd023:52:540
81440,0rcu_preempt3-21ksoftirqd/019:49:470
81440,0rcu_preempt26781-21kworker/0:019:45:430
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional