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2025-12-12 - 08:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackbslot1.osadl.org (updated Thu Dec 11, 2025 12:44:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
36093842216186,19sleep30-21swapper/307:07:303
36093812192159,24sleep00-21swapper/007:07:270
36093632192167,14sleep20-21swapper/207:07:132
36093522185161,14sleep10-21swapper/107:07:041
3609793997357,14cyclictest3816775-21kworker/u8:1+flush-179:010:31:502
3609790996865,2cyclictest3895786-21ThreadPoolForeg11:45:010
3609794996357,5cyclictest247560-21ThreadPoolForeg09:10:343
3609793996359,3cyclictest3651421-21kworker/u8:2+flush-179:008:30:012
3609793996256,4cyclictest3724489-21kworker/u8:3+flush-179:009:10:102
3609793996256,4cyclictest3677366-21kworker/u8:0+events_unbound08:20:292
3609794996155,5cyclictest3125725-21ThreadPoolForeg10:40:013
3609793996156,3cyclictest3708438-21kworker/u8:2+flush-179:010:05:202
3609793996055,4cyclictest3942601-21kworker/u8:0+flush-179:012:40:002
3609793995954,4cyclictest3873935-21kworker/u8:1+flush-179:011:25:402
3609793995954,4cyclictest3833924-21kworker/u8:5+events_unbound10:55:012
37240712580,1sleep20-21swapper/208:55:392
3609793995853,3cyclictest3567397-21kworker/u8:0+events_unbound07:50:192
3609793995852,4cyclictest3709113-21chrome08:45:012
3609793995851,5cyclictest3760346-21kworker/u8:1+flush-179:010:15:312
3609790995852,4cyclictest3708061-21munin-limits08:40:350
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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