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2026-01-04 - 06:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackbslot1.osadl.org (updated Sat Jan 03, 2026 12:44:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2722852199177,13sleep10-21swapper/107:07:551
2723742198174,14sleep30-21swapper/307:09:053
2723312196173,13sleep20-21swapper/207:08:312
2724462189165,14sleep00-21swapper/007:09:580
272664997168,2cyclictest277330-21kworker/u8:0+flush-179:007:20:122
272664997055,13cyclictest309687-21snmp_ryswitch2.07:45:022
272660996046,3cyclictest495120-21chrome10:45:021
272664995955,3cyclictest474174-21kworker/u8:3+flush-179:010:30:222
272664995954,3cyclictest530863-21kworker/u8:3+flush-179:011:55:112
272664995954,3cyclictest332322-21kworker/u8:4+flush-179:008:55:112
272664995854,3cyclictest329958-21kworker/u8:3+flush-179:008:20:292
272664995753,3cyclictest277330-21kworker/u8:0+flush-179:007:30:362
272664995653,2cyclictest555984-21kworker/u8:1+events_unbound11:45:312
272664995652,3cyclictest332322-21kworker/u8:4+events_unbound09:55:292
272664995652,3cyclictest314445-21kworker/u8:1+flush-179:007:50:302
27266499561,14cyclictest247560-21ThreadPoolForeg09:05:182
272660995549,4cyclictest453708-21/usr/share/muni10:05:161
272660995545,9cyclictest373309-21ntpq08:45:191
272664995451,2cyclictest545101-21kworker/u8:4+flush-179:011:34:292
272664995451,2cyclictest298809-21kworker/u8:2+flush-179:007:35:182
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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