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2025-11-29 - 13:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackbslot1.osadl.org (updated Fri Nov 28, 2025 12:44:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11194692213189,14sleep30-21swapper/307:08:093
11194512207183,14sleep00-21swapper/007:07:530
11195752196172,14sleep10-21swapper/107:09:301
11194272190166,14sleep20-21swapper/207:07:362
121361821360,2sleep31213614-21snmp_wlanpowerc08:40:003
1119798996460,3cyclictest1296084-21kworker/u8:0+events_unbound10:20:312
1119798996360,2cyclictest1156405-21kworker/u8:2+events_unbound08:00:102
1119798996359,3cyclictest1383514-21kworker/u8:0+events_unbound11:50:102
1119795996257,3cyclictest1281145-21snmp_wlanpowerc09:45:021
1119798996156,3cyclictest1275628-21kworker/u8:2+events_unbound10:19:062
1119798996057,2cyclictest1265410-21kworker/u8:0+events_unbound09:45:402
1119798996034,22cyclictest1404340-21kworker/u8:1+flush-179:012:25:052
1119798995956,2cyclictest1450416-21kworker/u8:2+events_unbound12:30:312
1119798995956,2cyclictest1341787-21kworker/u8:0+events_unbound11:05:342
1119794995849,7cyclictest247560-21ThreadPoolForeg10:20:080
111979499581,55cyclictest247557-21chrome10:05:010
1119798995742,13cyclictest1275628-21kworker/u8:2+flush-179:010:09:092
1119798995652,3cyclictest1238178-21kworker/u8:1+flush-179:009:10:072
1119798995651,4cyclictest1416580-21kworker/u8:3+flush-179:011:55:232
1119798995552,2cyclictest1341787-21kworker/u8:0+events_unbound10:48:232
1119794995547,6cyclictest3125688-21Chrome_ChildIOT09:20:350
1119794995547,6cyclictest3125687-21ThreadPoolForeg07:45:300
1119798995451,2cyclictest1383521-21kworker/u8:2+events_unbound11:40:312
1119798995451,2cyclictest1383521-21kworker/u8:2+events_unbound11:40:312
1119798995451,2cyclictest1341787-21kworker/u8:0+events_unbound10:55:292
1119798995442,10cyclictest1404340-21kworker/u8:1+flush-179:012:10:142
1119795995449,4cyclictest247516-21Chrome_ChildIOT12:10:341
1119799995350,2cyclictest1367742-21kworker/u8:1+events_unbound11:08:463
1119798995349,3cyclictest1275628-21kworker/u8:2+flush-179:009:40:182
1119798995349,3cyclictest1127285-21kworker/u8:1+events_unbound07:25:362
1119798995348,3cyclictest1265410-21kworker/u8:0+flush-179:009:50:272
1119794995348,3cyclictest1322067-21kworker/u8:1+events_unbound10:45:010
1119798995248,3cyclictest1404340-21kworker/u8:1+flush-179:012:17:082
1119798995248,3cyclictest1322067-21kworker/u8:1+events_unbound10:30:162
1119798995247,4cyclictest1198089-21kworker/u8:2+events_unbound08:53:312
1119798995247,3cyclictest1367801-21kworker/u8:3+flush-179:011:10:262
1119795995248,3cyclictest1311308-21kworker/u8:4+flush-179:010:15:121
1119794995248,3cyclictest1419619-21kworker/u8:4+flush-179:012:15:180
1119798995148,2cyclictest1367742-21kworker/u8:1+flush-179:011:20:262
1119798995148,2cyclictest1367742-21kworker/u8:1+flush-179:011:20:262
1119798995147,3cyclictest1265410-21kworker/u8:0+flush-179:009:30:332
1119798995146,4cyclictest1290969-21kworker/u8:1+events_unbound10:10:162
1119798995146,4cyclictest1290969-21kworker/u8:1+events_unbound10:10:152
1119798995036,13cyclictest1383521-21kworker/u8:2+events_unbound11:36:412
1119798995035,2cyclictest1321447-21kworker/2:2+pm10:26:192
1119798995023,26cyclictest3125721-21chrome09:29:152
1119794995045,4cyclictest1328933-21kworker/u8:3+flush-179:010:49:090
1119798994947,2cyclictest1332766-21kworker/u8:4+events_unbound10:40:222
1119798994946,2cyclictest1378042-21kworker/u8:4+events_unbound11:25:122
1119798994946,2cyclictest1198089-21kworker/u8:2+events_unbound09:00:302
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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