You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-10 - 23:33
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #c, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot7s.osadl.org (updated Tue Feb 10, 2026 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
74675899519501,15cyclictest823541-21turbostat10:49:560
74677199507500,4cyclictest780494-21turbostat08:49:553
74677199507500,4cyclictest780494-21turbostat08:49:553
74677199479456,20cyclictest812542-21turbostat10:19:543
74676699479454,22cyclictest777029-21turbostat08:39:552
74677199463456,4cyclictest862357-21turbostat12:39:553
74677199463456,4cyclictest843272-21turbostat11:40:003
74677199463440,20cyclictest763124-21turbostat07:55:003
74677199462455,4cyclictest848520-21turbostat11:59:553
74677199462455,4cyclictest848520-21turbostat11:59:553
74677199462454,5cyclictest792903-21turbostat09:24:553
74677199462453,6cyclictest766586-21turbostat08:05:013
74677199460453,4cyclictest816312-21turbostat10:25:003
74677199459452,4cyclictest801551-21turbostat09:45:003
74677199457450,4cyclictest796359-21turbostat09:30:003
74676699457449,5cyclictest806752-21turbostat10:04:562
74677199456449,4cyclictest821813-21turbostat10:40:003
74677199453432,17cyclictest778760-21turbostat08:40:003
74677199452445,4cyclictest827309-21turbostat10:55:003
74677199452445,4cyclictest778760-21turbostat08:44:553
74676699450443,4cyclictest755844-21turbostat07:39:552
74677199447440,4cyclictest771835-21turbostat08:20:003
74677199447440,4cyclictest750655-21turbostat07:24:553
74677199445438,4cyclictest775297-21turbostat08:34:553
74677199443436,4cyclictest785675-21turbostat09:04:553
74677199440429,8cyclictest832500-21turbostat11:14:563
74677199436429,4cyclictest855435-21turbostat12:15:003
74677199434427,4cyclictest789447-21turbostat09:14:553
74677199434426,5cyclictest844999-21turbostat11:49:553
74677199433426,4cyclictest830761-21turbostat11:09:553
74677199433424,6cyclictest853701-21turbostat12:10:003
74677199432423,6cyclictest754113-21turbostat07:30:003
74677199430422,5cyclictest862357-21turbostat12:35:003
74677199430421,6cyclictest783945-21turbostat08:59:553
74677199430412,15cyclictest754113-21turbostat07:34:553
74677199428421,4cyclictest768318-21turbostat08:10:003
74677199427420,4cyclictest798097-21turbostat09:35:003
74677199427419,5cyclictest798097-21turbostat09:39:553
74677199426417,6cyclictest764851-21turbostat08:00:003
74677199425417,4cyclictest748432-21turbostat07:15:003
74677199424399,22cyclictest838027-21turbostat11:29:553
74677199423415,5cyclictest834273-21turbostat11:19:553
74677199423400,19cyclictest829044-21turbostat11:00:003
74677199418411,4cyclictest860637-21turbostat12:29:593
74677199418411,4cyclictest801551-21turbostat09:49:543
74677199413406,4cyclictest761394-21turbostat07:50:003
74677199412401,8cyclictest812542-21turbostat10:15:003
74677199411402,6cyclictest808779-21turbostat10:05:003
74677199411400,8cyclictest829044-21turbostat11:04:553
74677199410403,4cyclictest792903-21turbostat09:20:003
74677199408400,5cyclictest787405-21turbostat09:09:553
74677199404397,4cyclictest757631-21turbostat07:44:553
74677199404396,5cyclictest810512-21turbostat10:10:003
74677199404379,5cyclictest818337-21turbostat10:34:553
74677199403396,4cyclictest846731-21turbostat11:54:553
74677199403395,5cyclictest843272-21turbostat11:44:553
74677199401379,4cyclictest855435-21turbostat12:19:553
74677199397390,4cyclictest771835-21turbostat08:24:553
74677199395387,5cyclictest836302-21turbostat11:24:553
74677199391383,5cyclictest816312-21turbostat10:29:553
74677199390381,6cyclictest821813-21turbostat10:44:553
74677199390380,7cyclictest805014-21turbostat09:59:553
74677199389382,4cyclictest805014-21turbostat09:55:003
74677199382375,4cyclictest783945-21turbostat08:55:003
74677199379373,3cyclictest857168-21turbostat12:24:563
74677199373367,3cyclictest851976-21turbostat12:05:003
74677199372365,4cyclictest768318-21turbostat08:14:553
74677199359351,5cyclictest839767-21turbostat11:34:563
74677199358351,4cyclictest773564-21turbostat08:29:553
74677199350342,5cyclictest748432-21turbostat07:19:553
74677199350342,5cyclictest748432-21turbostat07:19:553
74676699331324,4cyclictest761394-21turbostat07:54:552
74677199183152,26cyclictest757631-21turbostat07:40:003
746443213573,23sleep00-21swapper/007:07:420
746393213171,23sleep20-21swapper/207:07:042
745884212472,42sleep10-21swapper/107:05:221
746436210976,23sleep30-21swapper/307:07:373
746771999988,8cyclictest825575-21turbostat10:50:003
8172092960,7sleep24497-21PK-Backend10:25:162
8531782950,6sleep20-21swapper/212:05:292
8362982780,6sleep1836296-21perf11:20:001
197399660,8rtkit-daemon1972-21rtkit-daemon09:11:040
74675899658,33cyclictest764929-21grep08:00:020
197399640,17rtkit-daemon1972-21rtkit-daemon09:08:371
197399620,7rtkit-daemon1972-21rtkit-daemon09:09:170
197399620,18rtkit-daemon1972-21rtkit-daemon07:32:301
746763996113,33cyclictest839794-21unin-run11:30:011
197399610,17rtkit-daemon1972-21rtkit-daemon08:11:031
746758995810,31cyclictest13-21ksoftirqd/012:05:000
197399580,9rtkit-daemon1972-21rtkit-daemon09:56:301
197399580,9rtkit-daemon1972-21rtkit-daemon09:53:241
197399580,9rtkit-daemon1972-21rtkit-daemon09:45:381
197399580,8rtkit-daemon1972-21rtkit-daemon08:15:261
197399570,8rtkit-daemon1972-21rtkit-daemon09:19:041
197399570,8rtkit-daemon1972-21rtkit-daemon08:25:021
197399570,8rtkit-daemon1972-21rtkit-daemon08:23:130
197399560,6rtkit-daemon0-21swapper/212:15:012
746758995514,18cyclictest852848-21missed_timers12:05:220
197399540,9rtkit-daemon1972-21rtkit-daemon07:28:281
74675899515,20cyclictest8375402timerandwakeup11:20:290
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional