You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-16 - 04:55

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #a, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  TI
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot5s.osadl.org (updated Wed Sep 16, 2026 00:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
811430,0rcu_preempt3-21ksoftirqd/023:20:130
811370,0rcu_preempt3-21ksoftirqd/000:28:490
811360,0rcu_preempt3-21ksoftirqd/022:48:350
811360,0rcu_preempt3-21ksoftirqd/021:24:100
811350,0rcu_preempt3-21ksoftirqd/021:57:590
811350,0rcu_preempt3-21ksoftirqd/021:30:370
811350,0rcu_preempt3-21ksoftirqd/000:23:230
811340,0rcu_preempt3-21ksoftirqd/023:28:390
811340,0rcu_preempt3-21ksoftirqd/022:04:100
811330,0rcu_preempt3-21ksoftirqd/023:06:410
811330,0rcu_preempt3-21ksoftirqd/021:35:380
811320,0rcu_preempt3-21ksoftirqd/000:30:390
811310,0rcu_preempt3-21ksoftirqd/021:43:460
811310,0rcu_preempt3-21ksoftirqd/021:43:460
811310,0rcu_preempt3-21ksoftirqd/000:01:180
811300,0rcu_preempt3-21ksoftirqd/023:41:430
811300,0rcu_preempt3-21ksoftirqd/022:42:030
811290,0rcu_preempt3-21ksoftirqd/022:32:500
811290,0rcu_preempt3-21ksoftirqd/022:16:120
811290,0rcu_preempt3-21ksoftirqd/022:16:120
811290,0rcu_preempt3-21ksoftirqd/000:18:000
811280,0rcu_preempt3-21ksoftirqd/022:55:170
811270,0rcu_preempt3-21ksoftirqd/022:24:120
811250,0rcu_preempt3-21ksoftirqd/023:47:440
811250,0rcu_preempt3-21ksoftirqd/021:46:060
811240,0rcu_preempt3-21ksoftirqd/022:50:380
811220,0rcu_preempt3-21ksoftirqd/022:27:450
811140,0rcu_preempt3-21ksoftirqd/000:13:220
811110,0rcu_preempt3-21ksoftirqd/023:33:120
811110,0rcu_preempt3-21ksoftirqd/023:33:120
811110,0rcu_preempt3-21ksoftirqd/022:34:580
811110,0rcu_preempt3-21ksoftirqd/000:05:200
811040,0rcu_preempt3-21ksoftirqd/023:10:570
811010,0rcu_preempt3-21ksoftirqd/023:01:450
811010,0rcu_preempt3-21ksoftirqd/022:13:410
811010,0rcu_preempt3-21ksoftirqd/022:05:430
811000,0rcu_preempt3-21ksoftirqd/023:56:420
81990,0rcu_preempt3-21ksoftirqd/023:37:240
81990,0rcu_preempt3-21ksoftirqd/021:11:420
81980,0rcu_preempt836-21rngd19:10:590
81980,0rcu_preempt3-21ksoftirqd/021:27:060
81890,0rcu_preempt3-21ksoftirqd/020:04:410
81860,0rcu_preempt3-21ksoftirqd/023:51:020
81830,0rcu_preempt3-21ksoftirqd/021:00:400
81830,0rcu_preempt1780-21kworker/0:220:23:290
81820,0rcu_preempt3-21ksoftirqd/020:18:010
81820,0rcu_preempt3-21ksoftirqd/019:58:190
81810,0rcu_preempt3-21ksoftirqd/020:34:480
81800,0rcu_preempt3-21ksoftirqd/020:13:280
81800,0rcu_preempt3-21ksoftirqd/020:02:460
81790,0rcu_preempt3-21ksoftirqd/021:52:320
81770,0rcu_preempt3-21ksoftirqd/020:32:300
81760,0rcu_preempt3-21ksoftirqd/020:53:560
81760,0rcu_preempt3-21ksoftirqd/020:40:140
81760,0rcu_preempt3-21ksoftirqd/020:26:590
81750,0rcu_preempt3-21ksoftirqd/021:16:310
81750,0rcu_preempt3-21ksoftirqd/019:14:180
81750,0rcu_preempt3-21ksoftirqd/019:14:180
81740,0rcu_preempt3-21ksoftirqd/023:14:190
81740,0rcu_preempt3-21ksoftirqd/020:44:210
81740,0rcu_preempt3-21ksoftirqd/019:48:310
81740,0rcu_preempt13183-21kworker/0:121:05:580
81730,0rcu_preempt3-21ksoftirqd/019:50:160
81730,0rcu_preempt3-21ksoftirqd/000:34:220
81710,0rcu_preempt3-21ksoftirqd/020:58:160
81710,0rcu_preempt13013-21ping19:43:530
81670,0rcu_preempt13970-21swap19:19:470
10050670,0irq/346-4848400181ktimersoftd/122:42:401
10050660,0irq/346-4848400171rcuc/123:47:031
10050660,0irq/346-4848400171rcuc/123:21:121
10050650,0irq/346-4848400181ktimersoftd/100:27:361
10050640,0irq/346-4848400171rcuc/122:08:261
10050630,0irq/346-484840054-21kswapd022:24:351
10050630,0irq/346-4848400181ktimersoftd/123:55:181
10050620,0irq/346-4848400171rcuc/122:48:081
9950610,0irq/345-484840019-21ksoftirqd/123:51:461
81610,0rcu_preempt19-21ksoftirqd/121:59:391
9950600,0irq/345-4848400181ktimersoftd/122:21:501
10050600,0irq/346-4848400171rcuc/123:31:261
10050600,0irq/346-4848400171rcuc/123:31:261
10050600,0irq/346-4848400171rcuc/122:13:421
10050590,0irq/346-4848400181ktimersoftd/100:29:561
10050590,0irq/346-4848400171rcuc/100:20:541
10050590,0irq/346-4848400171rcuc/100:10:411
9950580,0irq/345-484840019-21ksoftirqd/121:42:541
9950580,0irq/345-484840019-21ksoftirqd/121:42:541
10050580,0irq/346-484840054-21kswapd000:07:081
10050580,0irq/346-4848400171rcuc/123:26:291
9950570,0irq/345-4848400181ktimersoftd/123:02:591
9950570,0irq/345-4848400171rcuc/121:28:461
81570,0rcu_preempt3-21ksoftirqd/019:24:360
81570,0rcu_preempt19-21ksoftirqd/119:39:171
10050570,0irq/346-4848400181ktimersoftd/123:17:541
10050570,0irq/346-4848400171rcuc/121:22:391
9950560,0irq/345-4848400181ktimersoftd/121:38:011
10050540,0irq/346-4848400181ktimersoftd/120:14:251
10050540,0irq/346-4848400181ktimersoftd/100:17:101
10050540,0irq/346-4848400181ktimersoftd/100:02:021
10050530,0irq/346-484840054-21kswapd022:17:271
10050530,0irq/346-484840054-21kswapd022:17:271
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional