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2024-02-23 - 18:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackcslot8.osadl.org (updated Fri Feb 23, 2024 00:48:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
187342228220,6sleep180-21swapper/1819:08:4210
20011991695,107cyclictest0-21swapper/021:45:330
20011991695,107cyclictest0-21swapper/021:45:330
201579915324,127cyclictest0-21swapper/2523:44:4918
20109991530,89cyclictest0-21swapper/1721:09:269
20109991530,89cyclictest0-21swapper/1721:09:269
201509914931,68cyclictest0-21swapper/2420:45:3417
20011991490,89cyclictest0-21swapper/023:33:120
20011991480,84cyclictest0-21swapper/022:00:270
20011991480,84cyclictest0-21swapper/022:00:270
20011991470,85cyclictest0-21swapper/022:12:130
20011991460,87cyclictest0-21swapper/021:07:050
20011991460,87cyclictest0-21swapper/021:07:040
202049914425,68cyclictest151rcu_preempt23:30:2724
20109991440,84cyclictest0-21swapper/1719:45:349
20109991430,85cyclictest0-21swapper/1722:53:239
20091991430,83cyclictest0-21swapper/1321:25:085
20091991430,83cyclictest0-21swapper/1321:25:075
20021991434,115cyclictest0-21swapper/220:40:3512
200119914350,57cyclictest0-21swapper/021:41:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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