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2024-07-27 - 07:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Sat Jul 27, 2024 00:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2472521180,0sleep30-21swapper/321:12:503
3067921170,0sleep00-21swapper/022:56:510
3067921170,0sleep00-21swapper/022:56:510
205492890,1sleep31037-21runrttasks23:02:553
115352890,0sleep10-21swapper/123:30:261
202782840,0sleep10-21swapper/122:41:211
26932830,0sleep4491rcuc/421:31:434
4492810,0sleep40-21swapper/421:27:584
4492810,0sleep40-21swapper/421:27:584
197252800,0sleep20-21swapper/221:58:342
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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