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2024-04-26 - 18:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Fri Apr 26, 2024 12:45:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
671221560,3sleep2458399cyclictest10:15:102
1434421350,0sleep70-21swapper/710:40:477
2663421150,4sleep4459599cyclictest09:38:094
52302830,0sleep00-21swapper/011:26:160
233962790,0sleep20-21swapper/210:59:512
222602790,0sleep00-21swapper/011:31:460
307662780,1sleep00-21swapper/010:42:420
287402760,1sleep728728-21ntp_states11:25:197
210702760,1sleep60-21swapper/609:26:496
113232750,0sleep50-21swapper/512:28:025
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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