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2024-05-27 - 09:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack0slot0.osadl.org (updated Mon May 27, 2024 00:45:19)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1205621280,0sleep40-21swapper/400:14:394
1205621280,0sleep40-21swapper/400:14:394
1334021270,0sleep20-21swapper/223:32:532
52452900,0sleep50-21swapper/523:56:285
287422840,1sleep41037-21runrttasks23:29:344
227462840,1sleep00-21swapper/022:03:370
11742810,0sleep20-21swapper/222:19:432
82882790,1sleep08285-21sshd21:20:570
82882790,1sleep08285-21sshd21:20:570
276972790,1sleep5591ktimersoftd/523:53:405
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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