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2025-07-12 - 12:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot0.osadl.org (updated Sat Jul 12, 2025 00:45:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1733521090,4sleep11274999cyclictest00:29:411
109772840,11sleep41276999cyclictest22:53:364
295692810,0sleep50-21swapper/500:30:505
49272800,1sleep74925-21bash23:40:107
49272800,1sleep74925-21bash23:40:107
179492790,1sleep30-21swapper/321:30:473
298952780,0sleep50-21swapper/522:52:085
282872780,2sleep30-21swapper/322:55:183
11352780,1sleep40-21swapper/423:16:034
156852770,0sleep081ktimersoftd/022:00:170
316882760,0sleep70-21swapper/721:48:467
251372760,0sleep40-21swapper/421:25:034
233692760,0sleep10-21swapper/100:33:421
164212760,1sleep616399-21sshd00:26:016
130142760,0sleep70-21swapper/721:43:337
37022750,0sleep50-21swapper/519:55:225
274232750,0sleep70-21swapper/723:52:367
253532750,0sleep00-21swapper/000:27:000
250932750,0sleep30-21swapper/322:17:593
48552740,1sleep54849-21sshd22:46:065
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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