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2026-03-16 - 09:36

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #0

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System r0s0s.osadl.org (updated Mon Mar 16, 2026 00:46:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14746132309286,15sleep70-21swapper/719:05:267
14758292299287,8sleep60-21swapper/619:07:586
14758182293273,12sleep40-21swapper/419:07:484
14738692293260,26sleep00-21swapper/019:05:030
14759432287268,12sleep50-21swapper/519:09:345
14758342287267,13sleep10-21swapper/119:08:011
14757002287268,12sleep20-21swapper/219:06:092
14738722286266,13sleep30-21swapper/319:05:063
1476450994139,2cyclictest1616500-21kworker/u16:2+flush-8:000:10:004
1476450994038,2cyclictest1470836-21kworker/u16:3+flush-8:019:15:054
1476450993836,2cyclictest1522903-21kworker/u16:0+flush-8:020:50:294
1476448993836,2cyclictest1630960-21kworker/u16:0+flush-8:000:30:262
1476450993532,3cyclictest1578344-21kworker/u16:1+events_unbound22:40:284
1476452993330,2cyclictest449069-21snmpd22:58:006
1476452993330,2cyclictest449069-21snmpd22:15:576
1476452993330,2cyclictest449069-21snmpd21:47:206
147645299330,30cyclictest0-21swapper/619:12:276
147645299330,30cyclictest0-21swapper/600:39:306
147645299330,30cyclictest0-21swapper/600:24:196
1476451993330,2cyclictest449069-21snmpd21:24:435
1476451993329,3cyclictest449069-21snmpd23:58:125
1476450993332,1cyclictest1543416-21kworker/u16:3+flush-8:022:00:004
147644999330,30cyclictest0-21swapper/321:40:113
1476447993330,2cyclictest449069-21snmpd20:32:261
1476447993330,2cyclictest449069-21snmpd20:10:201
147644699330,30cyclictest0-21swapper/020:57:180
1476453993230,1cyclictest449069-21snmpd21:40:147
1476453993230,1cyclictest449069-21snmpd21:02:317
1476453993229,2cyclictest449069-21snmpd23:04:097
1476453993229,2cyclictest449069-21snmpd20:30:117
1476453993229,2cyclictest449069-21snmpd19:49:007
147645399320,31cyclictest0-21swapper/720:06:327
1476452993230,1cyclictest449069-21snmpd23:22:596
1476452993230,1cyclictest449069-21snmpd23:07:286
1476452993229,2cyclictest449069-21snmpd23:51:426
1476452993229,2cyclictest449069-21snmpd00:11:116
147645299320,30cyclictest0-21swapper/623:48:216
1476451993230,2cyclictest449069-21snmpd21:11:015
1476451993230,1cyclictest449069-21snmpd22:30:215
1476451993230,1cyclictest449069-21snmpd20:59:195
1476451993230,1cyclictest449069-21snmpd19:58:235
1476451993229,2cyclictest449069-21snmpd21:32:115
147645199320,31cyclictest0-21swapper/523:05:425
147645199320,31cyclictest0-21swapper/520:42:545
147645199320,31cyclictest0-21swapper/520:05:145
147645199320,31cyclictest0-21swapper/519:36:375
147645199320,31cyclictest0-21swapper/500:15:125
147645199320,31cyclictest0-21swapper/500:15:115
1476450993230,2cyclictest1630960-21kworker/u16:0+flush-8:000:20:294
147645099320,31cyclictest0-21swapper/419:40:224
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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