You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2022-07-01 - 01:33

x86 Intel Core i7-3770K @3500 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a4-7 -p99 -i200 -h400 -t4 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Fri Jul 01, 2022 00:43:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1650205991414,0cyclictest0-21swapper/700:17:447
165020599140,0cyclictest0-21swapper/719:26:327
1650204991313,0cyclictest0-21swapper/623:34:446
1650204991311,2cyclictest0-21swapper/600:15:346
1650203991313,0cyclictest0-21swapper/521:40:595
165020399130,0cyclictest0-21swapper/520:34:465
1650201991313,0cyclictest0-21swapper/400:39:444
16843082120,0sleep60-21swapper/620:04:576
1650205991212,0cyclictest0-21swapper/721:19:167
165020399120,12cyclictest0-21swapper/522:46:165
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional