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2024-07-27 - 08:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot2.osadl.org (updated Sat Jul 27, 2024 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
151284525622,29sleep70-21swapper/718:58:257
151301225545,7sleep50-21swapper/519:00:485
151302024736,8sleep40-21swapper/419:00:554
1513433993833,4cyclictest630-21systemd-journal22:22:304
1513441993631,4cyclictest630-21systemd-journal23:37:306
151291923523,8sleep60-21swapper/618:59:296
1513433992927,2cyclictest2083059-21kworker/u16:2+events_unbound00:02:304
1513438992724,2cyclictest1848483-21kworker/u16:3+events_unbound22:17:475
1513438992622,3cyclictest2131909-21latency_hist00:17:315
1513433992421,2cyclictest1986204-21kworker/u16:3+flush-8:023:12:504
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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