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2021-10-26 - 22:58

Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz, Linux 5.10.1-rt20 (Profile)

Latency plot of system in rack #0, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q --smi
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot2.osadl.org (updated Tue Oct 26, 2021 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
37856132610,0sleep50-21swapper/523:34:595
355337626050,6sleep60-21swapper/619:02:316
37291002580,0sleep10-21swapper/122:44:411
36932222550,0sleep30-21swapper/322:11:443
36932222550,0sleep30-21swapper/322:11:443
38259692540,0sleep70-21swapper/700:10:177
38036202540,0sleep50-21swapper/523:50:135
35541422540,0sleep50-21swapper/519:04:535
355350024839,6sleep30-21swapper/319:03:483
355356524131,6sleep40-21swapper/419:04:294
355348123930,6sleep70-21swapper/719:03:367
355347323926,6sleep20-21swapper/219:03:312
355340623526,6sleep00-21swapper/019:02:490
355323023424,6sleep50-21swapper/519:01:025
355349722920,6sleep10-21swapper/119:03:461
37329532210,2sleep755-21ksoftirqd/722:47:447
355384999210,4cyclictest0-21swapper/223:59:242
3553862991916,2cyclictest3763499-21cat23:14:565
37474782180,0sleep30-21swapper/323:00:053
36546662180,0sleep60-21swapper/621:37:276
355386599189,1cyclictest0-21swapper/620:07:146
3553854991815,2cyclictest865-21snmpd23:07:013
37178862170,0sleep225-21ksoftirqd/222:34:412
355386599179,1cyclictest0-21swapper/622:47:316
355384999179,1cyclictest0-21swapper/200:12:482
355386299150,1cyclictest0-21swapper/520:35:015
355384699150,7cyclictest0-21swapper/121:54:021
3553842991513,1cyclictest865-21snmpd19:54:110
355384299150,14cyclictest3649474-21ssh21:33:020
3553868991413,1cyclictest80950irq/48-p4p121:40:297
355386899140,7cyclictest0-21swapper/700:32:167
355386899140,14cyclictest0-21swapper/723:18:517
355386599140,7cyclictest0-21swapper/622:24:556
3553862991412,1cyclictest865-21snmpd20:54:315
355386299140,7cyclictest0-21swapper/500:20:395
355386299140,1cyclictest0-21swapper/521:33:145
355385899146,7cyclictest0-21swapper/423:51:364
355385899146,1cyclictest0-21swapper/421:52:084
355385899140,1cyclictest3693917-21ssh22:12:454
355385899140,1cyclictest3693917-21ssh22:12:454
355385899140,1cyclictest0-21swapper/420:13:234
355385899140,1cyclictest0-21swapper/420:13:234
355385499145,9cyclictest0-21swapper/321:30:553
3553854991412,1cyclictest0-21swapper/321:37:243
3553849991413,1cyclictest2513-21pool-gsd-smartc21:12:052
3553846991412,1cyclictest0-21swapper/121:25:251
37949172130,0sleep10-21swapper/123:43:441
3553868991313,0cyclictest0-21swapper/723:39:217
3553868991313,0cyclictest0-21swapper/700:19:147
355386899130,13cyclictest0-21swapper/723:56:517
355386899130,13cyclictest0-21swapper/722:55:317
355386899130,13cyclictest0-21swapper/722:52:507
355386899130,13cyclictest0-21swapper/722:06:587
355386899130,13cyclictest0-21swapper/721:21:057
355386899130,13cyclictest0-21swapper/700:20:207
355386599130,13cyclictest0-21swapper/621:44:316
355386299135,7cyclictest0-21swapper/522:45:555
355386299135,1cyclictest0-21swapper/523:47:445
355386299135,1cyclictest0-21swapper/519:11:225
355385899135,1cyclictest0-21swapper/400:00:034
3553858991313,0cyclictest0-21swapper/423:24:584
3553858991311,1cyclictest0-21swapper/420:33:214
355385899130,1cyclictest0-21swapper/400:29:274
355385899130,0cyclictest0-21swapper/421:36:504
3553854991313,0cyclictest0-21swapper/323:51:053
3553854991312,1cyclictest3622304-21ssh21:09:113
355385499130,13cyclictest0-21swapper/322:15:143
355385499130,13cyclictest0-21swapper/321:52:043
355385499130,13cyclictest0-21swapper/321:21:293
355384999136,1cyclictest0-21swapper/223:03:342
355384999130,0cyclictest0-21swapper/222:15:282
355384999130,0cyclictest0-21swapper/221:52:172
3553846991313,0cyclictest0-21swapper/100:15:251
355384699130,13cyclictest0-21swapper/123:28:261
355384699130,13cyclictest0-21swapper/122:45:241
355384699130,13cyclictest0-21swapper/122:29:281
355384699130,0cyclictest0-21swapper/123:54:271
3553842991311,1cyclictest3772184-21ssh23:23:050
3553868991212,0cyclictest0-21swapper/721:50:537
355386899120,12cyclictest0-21swapper/723:21:327
355386899120,12cyclictest0-21swapper/721:31:587
3553865991212,0cyclictest0-21swapper/623:33:186
3553865991212,0cyclictest0-21swapper/621:20:526
3553865991212,0cyclictest0-21swapper/619:10:016
3553865991210,1cyclictest3849506-21sh00:34:376
3553865991210,1cyclictest0-21swapper/622:19:036
355386599120,5cyclictest0-21swapper/623:22:286
355386599120,12cyclictest0-21swapper/622:41:546
355386599120,12cyclictest0-21swapper/622:22:026
355386599120,12cyclictest0-21swapper/600:18:046
355386599120,0cyclictest0-21swapper/623:26:596
355386299129,2cyclictest865-21snmpd19:41:205
355386299120,12cyclictest0-21swapper/522:56:545
355386299120,12cyclictest0-21swapper/522:27:265
355386299120,12cyclictest0-21swapper/521:50:135
355386299120,12cyclictest0-21swapper/519:56:145
355386299120,12cyclictest0-21swapper/519:53:245
355386299120,12cyclictest0-21swapper/500:13:415
3553858991212,0cyclictest0-21swapper/422:29:484
3553858991212,0cyclictest0-21swapper/420:20:034
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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