You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2022-09-25 - 12:51
/usr/bin/Xorg /usr/bin/Xorg

x86 Intel Core i7-3770K @3500 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a4-7 -p99 -i200 -h400 -t4 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot2.osadl.org (updated Sun Sep 25, 2022 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
23322402910,0sleep40-21swapper/422:30:234
193028525949,6sleep50-21swapper/519:06:375
193002624715,28sleep70-21swapper/719:03:037
193009124435,6sleep40-21swapper/419:03:564
193028824132,6sleep60-21swapper/619:06:386
193059799164,9cyclictest918-21lldpd23:42:217
1930597991612,3cyclictest1696195-21snmpd19:31:567
193059799160,15cyclictest1696195-21snmpd20:41:577
193059799150,14cyclictest1696195-21snmpd20:25:367
193059499150,15cyclictest0-21swapper/422:51:044
193059499150,0cyclictest0-21swapper/423:03:504
193059799143,8cyclictest38314-10wireplumber23:27:587
1930594991413,1cyclictest0-21swapper/422:36:144
193059499140,14cyclictest0-21swapper/421:08:164
193059499140,0cyclictest0-21swapper/420:52:594
193059499140,0cyclictest0-21swapper/419:07:214
193059799139,3cyclictest2389639-21cat22:57:137
193059799139,3cyclictest1696195-21snmpd20:55:397
193059799139,3cyclictest1696195-21snmpd00:18:327
193059799134,8cyclictest2562236-21ntpq00:12:187
193059799132,10cyclictest1992430-10grep19:37:107
1930597991310,2cyclictest1696195-21snmpd19:47:237
1930596991313,0cyclictest0-21swapper/621:12:376
1930596991313,0cyclictest0-21swapper/600:24:576
193059699130,13cyclictest0-21swapper/622:40:456
193059699130,0cyclictest0-21swapper/622:08:256
193059699130,0cyclictest0-21swapper/619:47:196
1930595991313,0cyclictest0-21swapper/523:18:535
1930595991312,1cyclictest2287375-21kworker/5:022:12:215
193059599130,13cyclictest0-21swapper/522:41:505
193059599130,13cyclictest0-21swapper/522:18:585
193059599130,13cyclictest0-21swapper/522:07:285
193059599130,13cyclictest0-21swapper/522:02:345
193059599130,13cyclictest0-21swapper/521:35:185
193059599130,13cyclictest0-21swapper/519:27:175
193059599130,13cyclictest0-21swapper/500:23:505
193059599130,13cyclictest0-21swapper/500:05:045
193059599130,0cyclictest0-21swapper/523:37:385
193059599130,0cyclictest0-21swapper/523:34:105
1930594991313,0cyclictest0-21swapper/423:36:474
1930594991313,0cyclictest0-21swapper/419:12:144
1930594991311,2cyclictest0-21swapper/423:21:104
193059499130,0cyclictest0-21swapper/422:08:304
193059499130,0cyclictest0-21swapper/422:01:524
193059799129,2cyclictest1696195-21snmpd23:11:197
193059799129,2cyclictest1696195-21snmpd20:30:157
193059799128,3cyclictest2356454-21cat22:42:087
193059799128,3cyclictest2245983-21cat21:52:067
193059799128,3cyclictest2013784-21grep19:52:017
193059799128,3cyclictest1976927-21ntpq19:27:137
193059799128,3cyclictest1696195-21snmpd23:52:407
193059799128,3cyclictest1696195-21snmpd23:50:197
193059799128,3cyclictest1696195-21snmpd23:03:247
193059799128,3cyclictest1696195-21snmpd22:37:547
193059799128,3cyclictest1696195-21snmpd20:13:357
193059799128,3cyclictest1696195-21snmpd19:17:227
193059799127,4cyclictest2270784-21cat22:02:117
193059799127,4cyclictest1996797-21cat19:42:057
193059799124,7cyclictest2212001-21/usr/sbin/munin21:37:117
193059799124,7cyclictest2182814-21kthreadcore21:22:147
193059799123,7cyclictest38314-10wireplumber21:12:597
193059799123,1cyclictest2341214-21ntp_states22:32:207
193059799122,3cyclictest918-21lldpd20:18:177
1930597991212,0cyclictest0-21swapper/723:59:027
1930597991212,0cyclictest0-21swapper/722:30:447
193059799120,11cyclictest2094174-21ps20:37:077
1930596991212,0cyclictest0-21swapper/623:27:156
1930596991212,0cyclictest0-21swapper/622:05:166
1930596991212,0cyclictest0-21swapper/600:03:026
193059699120,12cyclictest0-21swapper/623:14:006
193059699120,0cyclictest0-21swapper/623:46:016
1930595991212,0cyclictest0-21swapper/523:30:425
1930595991212,0cyclictest0-21swapper/521:11:015
1930595991212,0cyclictest0-21swapper/520:11:355
193059599120,12cyclictest0-21swapper/522:29:225
193059599120,12cyclictest0-21swapper/519:14:405
193059599120,0cyclictest0-21swapper/522:24:105
1930594991212,0cyclictest0-21swapper/422:40:014
1930594991212,0cyclictest0-21swapper/421:55:154
1930594991212,0cyclictest0-21swapper/400:27:234
1930594991211,1cyclictest0-21swapper/421:56:594
1930594991210,2cyclictest0-21swapper/400:32:354
1930594991210,2cyclictest0-21swapper/400:23:554
193059499120,12cyclictest0-21swapper/420:27:174
193059799118,2cyclictest1696195-21snmpd23:25:167
193059799118,2cyclictest1696195-21snmpd20:50:277
193059799118,2cyclictest1696195-21snmpd19:23:477
193059799118,2cyclictest1696195-21snmpd19:09:317
193059799117,3cyclictest2600013-21irqstats00:32:137
193059799117,3cyclictest2234988-21cat21:47:067
193059799117,3cyclictest1950581-21ntp_states19:12:147
193059799117,3cyclictest1696195-21snmpd21:05:377
193059799117,3cyclictest1696195-21snmpd20:00:147
193059799117,3cyclictest1696195-21snmpd00:09:567
193059799116,4cyclictest2485212-21seq23:37:227
193059799116,4cyclictest2386294-21sh22:52:597
193059799116,4cyclictest2290592-21irqcore22:12:087
193059799116,4cyclictest2265052-21rm21:58:267
193059799114,2cyclictest2202298-21cut21:32:107
193059799113,7cyclictest2593957-21cut00:27:207
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional