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2022-12-02 - 00:56

x86 Intel Core i7-3770K @3500 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #2
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -n -a4-7 -p99 -i200 -h400 -t4 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100, highest latencies:
System rack0slot2.osadl.org (updated Thu Dec 01, 2022 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
193781026645,6sleep40-21swapper/407:01:094
193775725119,28sleep70-21swapper/707:00:247
193777424737,6sleep60-21swapper/607:00:396
193769224637,6sleep50-21swapper/506:59:345
21995152360,0sleep40-21swapper/409:17:374
1938158991814,3cyclictest1696195-21snmpd12:10:497
1938158991714,2cyclictest1696195-21snmpd11:03:297
1938158991613,2cyclictest1696195-21snmpd12:13:377
1938155991615,1cyclictest2034239-21kworker/u16:107:51:385
193815599160,16cyclictest0-21swapper/507:44:285
193815599160,16cyclictest0-21swapper/507:28:055
193815599160,16cyclictest0-21swapper/507:12:435
193815599160,16cyclictest0-21swapper/507:02:295
193815599160,15cyclictest0-21swapper/507:52:395
193815599160,15cyclictest0-21swapper/507:27:035
193815899154,8cyclictest918-21lldpd10:22:377
193815799150,14cyclictest0-21swapper/610:32:466
193815599150,15cyclictest0-21swapper/508:06:595
193815599150,15cyclictest0-21swapper/507:33:125
193815599150,15cyclictest0-21swapper/507:18:525
1938153991515,0cyclictest0-21swapper/409:49:354
193815899149,4cyclictest1696195-21snmpd09:43:427
193815899147,6cyclictest1696195-21snmpd11:39:457
193815599140,14cyclictest0-21swapper/507:59:495
193815399140,14cyclictest0-21swapper/411:55:524
193815399140,14cyclictest0-21swapper/411:55:524
193815899139,3cyclictest1696195-21snmpd09:03:057
193815899133,3cyclictest918-21lldpd07:49:037
1938158991310,2cyclictest1696195-21snmpd07:06:177
193815899130,12cyclictest2375772-21grep10:32:467
193815899130,12cyclictest2093392-21grep08:22:437
193815899130,12cyclictest1696195-21snmpd08:03:107
193815799130,13cyclictest0-21swapper/611:33:006
193815799130,13cyclictest0-21swapper/611:02:536
193815799130,0cyclictest0-21swapper/611:50:206
193815399130,13cyclictest0-21swapper/412:22:404
193815399130,13cyclictest0-21swapper/412:01:524
193815399130,13cyclictest0-21swapper/411:39:384
193815399130,13cyclictest0-21swapper/409:32:534
193815399130,13cyclictest0-21swapper/409:08:454
193815399130,0cyclictest0-21swapper/412:28:024
193815399130,0cyclictest0-21swapper/411:49:534
193815399130,0cyclictest0-21swapper/411:29:234
193815399130,0cyclictest0-21swapper/411:17:434
193815399130,0cyclictest0-21swapper/410:44:464
193815399130,0cyclictest0-21swapper/410:28:324
193815399130,0cyclictest0-21swapper/409:13:014
193815399130,0cyclictest0-21swapper/409:07:204
193815399130,0cyclictest0-21swapper/408:32:494
20359992120,0sleep60-21swapper/607:52:436
193815899129,2cyclictest1696195-21snmpd10:30:137
193815899129,2cyclictest1696195-21snmpd10:08:457
193815899129,2cyclictest1696195-21snmpd09:37:277
193815899129,2cyclictest1696195-21snmpd09:37:277
193815899129,2cyclictest1696195-21snmpd08:32:587
193815899128,3cyclictest1696195-21snmpd11:21:327
193815899128,3cyclictest1696195-21snmpd09:34:577
193815899128,3cyclictest1696195-21snmpd09:16:147
193815899124,7cyclictest2534375-21kthreadcore12:00:057
193815899124,7cyclictest2481394-21kthreadcore11:28:217
193815899124,7cyclictest2403867-21kthreadcore10:42:467
193815899124,5cyclictest918-21lldpd07:32:537
193815899123,8cyclictest2228225-21ssh09:27:467
193815899123,3cyclictest918-21lldpd08:21:047
193815899122,9cyclictest2513990-21munin-run11:47:247
193815899122,7cyclictest38314-10wireplumber09:07:477
1938158991212,0cyclictest0-21swapper/711:15:537
1938158991212,0cyclictest0-21swapper/709:18:457
193815899120,3cyclictest2350209-21munin-plugin-st10:22:257
193815899120,2cyclictest918-21lldpd08:46:247
1938157991212,0cyclictest0-21swapper/611:00:036
1938157991212,0cyclictest0-21swapper/610:43:016
1938157991212,0cyclictest0-21swapper/609:10:286
1938157991212,0cyclictest0-21swapper/608:48:156
1938157991212,0cyclictest0-21swapper/608:27:456
193815799120,0cyclictest0-21swapper/609:45:196
193815799120,0cyclictest0-21swapper/608:32:486
1938155991212,0cyclictest0-21swapper/512:21:005
1938155991212,0cyclictest0-21swapper/511:57:125
1938155991212,0cyclictest0-21swapper/511:57:125
193815599120,0cyclictest0-21swapper/511:58:375
1938153991212,0cyclictest0-21swapper/410:34:314
1938153991212,0cyclictest0-21swapper/409:43:554
193815399120,0cyclictest0-21swapper/412:15:164
193815399120,0cyclictest0-21swapper/409:31:274
193815899118,2cyclictest1977747-21ntp_states07:18:007
193815899118,2cyclictest1696195-21snmpd12:31:377
193815899118,2cyclictest1696195-21snmpd09:25:477
193815899117,3cyclictest2421617-21cat10:53:127
193815899117,3cyclictest2163134-21smart_sda08:57:557
193815899117,3cyclictest1696195-21snmpd11:47:307
193815899116,4cyclictest2568206-21rm12:20:017
193815899114,6cyclictest2333942-21kthreadcore10:12:497
193815899114,2cyclictest2454974-21ntpq11:08:127
193815899113,7cyclictest2490923-21fschecks_count11:36:347
193815899113,7cyclictest2473274-21ssh11:23:087
193815899113,7cyclictest2388283-21tr10:37:467
193815899112,8cyclictest2433155-21rm10:59:327
193815899112,8cyclictest2303107-21rm10:01:237
193815899110,5cyclictest0-21swapper/712:26:137
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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