You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-16 - 18:37
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot2.osadl.org (updated Tue Dec 16, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21929562610,0sleep72192957-21uname12:04:597
161472325520,30sleep70-21swapper/707:05:187
1615322994239,2cyclictest2239874-21kworker/u16:4+events_unbound12:29:564
1615332993730,6cyclictest1735345-21latency_hist08:09:437
161487823727,7sleep60-21swapper/607:07:256
1615327993532,2cyclictest2065130-21kworker/u16:4+flush-8:010:59:565
1615332993428,5cyclictest1686859-21latency_hist07:44:437
1615322993431,2cyclictest2006642-21kworker/u16:2+events_unbound11:04:434
1615322993331,2cyclictest1726017-21kworker/u16:2+events_unbound08:29:454
161500023321,9sleep40-21swapper/407:09:084
1615322993231,1cyclictest1861527-21kworker/u16:0+flush-8:009:49:424
161479423221,8sleep50-21swapper/507:06:125
1615322993129,2cyclictest2152897-21kworker/u16:3+events_unbound12:15:024
1615328993028,2cyclictest2006642-21kworker/u16:2+flush-8:010:40:126
1615328992927,2cyclictest2041656-21kworker/u16:0+events_unbound11:02:546
1615327992927,2cyclictest2143207-21kworker/u16:1+flush-8:012:05:115
1615327992927,2cyclictest2025336-21kworker/u16:3+events_unbound11:17:535
1615322992927,2cyclictest1948904-21kworker/u16:2+events_unbound10:09:584
19478892280,1chrt1939382-21/usr/sbin/munin09:55:117
1615328992826,2cyclictest2216109-21kworker/u16:2+events_unbound12:27:136
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional