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2025-07-17 - 14:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot2.osadl.org (updated Thu Jul 17, 2025 12:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24912182880,1sleep72491217-21cut19:12:237
2031367993230,2cyclictest2002188-21kworker/u16:0+flush-8:015:42:006
2031351993229,2cyclictest2106904-21kworker/u16:3+events_unbound16:42:074
2031351993228,3cyclictest2086054-21kworker/u16:2+flush-8:016:02:054
2031367993129,2cyclictest2211724-21kworker/u16:6+events_unbound17:07:086
2031367993129,2cyclictest2200230-21kworker/u16:3+events_unbound17:42:056
2031367993128,2cyclictest2211724-21kworker/u16:6+flush-8:017:17:246
2031367993027,2cyclictest2375259-21kworker/u16:3+events_unbound18:22:076
2031367993027,2cyclictest2261570-21kworker/u16:1+events_unbound18:12:076
2031367992926,2cyclictest2055703-21kworker/u16:1+flush-8:015:47:076
2031367992926,2cyclictest2055703-21kworker/u16:1+flush-8:015:47:076
2031351992927,2cyclictest2313570-21kworker/u16:2+flush-8:019:12:354
2031367992826,2cyclictest2558506-21kworker/u16:5+flush-8:020:22:236
203137399260,24cyclictest2312838-21latency_hist17:47:057
2031351992624,2cyclictest2200230-21kworker/u16:3+flush-8:017:04:154
2031351992624,2cyclictest2128180-21kworker/u16:2+flush-8:017:17:314
203137399250,23cyclictest2302549-21latency_hist17:42:057
2031367992523,2cyclictest2002188-21kworker/u16:0+flush-8:015:32:376
2031373992422,1cyclictest0-21swapper/720:42:357
203137399240,22cyclictest2240738-21latency_hist17:12:047
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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