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2024-06-17 - 23:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Mon Jun 17, 2024 12:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
187469225521,29sleep70-21swapper/707:03:437
1875107994745,2cyclictest1913464-21kworker/u16:4+flush-8:007:47:124
1875107994644,2cyclictest2015204-21kworker/u16:4+events_unbound08:10:474
187476924013,8sleep50-21swapper/507:04:455
187472723322,8sleep40-21swapper/407:04:124
1875107993129,2cyclictest2075514-21kworker/u16:0+flush-8:009:15:104
1875108993026,3cyclictest2026043-21kworker/u16:1+flush-8:008:25:395
1875107993028,2cyclictest1996548-21kworker/u16:3+flush-8:008:40:404
1875107993028,2cyclictest1889155-21kworker/u16:1+flush-8:007:50:264
18745642306,8sleep60-21swapper/607:02:066
1875107992725,2cyclictest2436667-21kworker/u16:1+flush-8:012:05:464
1875107992725,2cyclictest2271156-21kworker/u16:2+flush-8:011:30:394
1875107992725,2cyclictest2251208-21kworker/u16:1+flush-8:010:45:364
1875107992624,2cyclictest2271156-21kworker/u16:2+flush-8:010:40:334
1875107992624,2cyclictest2230823-21kworker/u16:3+events_unbound10:11:004
1875107992624,2cyclictest1996548-21kworker/u16:3+events_unbound08:25:404
1875107992624,2cyclictest1947228-21kworker/u16:0+flush-8:008:15:374
1875107992523,2cyclictest2271156-21kworker/u16:2+flush-8:010:25:364
1875107992523,2cyclictest2114777-21kworker/u16:4+flush-8:009:40:104
1875107992522,2cyclictest2026043-21kworker/u16:1+flush-8:009:20:364
1875110992422,1cyclictest0-21swapper/709:10:107
1875107992321,2cyclictest2505542-21kworker/u16:2+flush-8:012:25:304
1875107992321,2cyclictest1996548-21kworker/u16:3+flush-8:008:20:244
1875107992320,3cyclictest2361012-21kworker/u16:0+flush-8:011:45:304
1875107992320,3cyclictest2361012-21kworker/u16:0+flush-8:011:45:304
1875107992220,2cyclictest2310250-21kworker/u16:3+events_unbound10:58:204
1875107992220,2cyclictest2251208-21kworker/u16:1+flush-8:010:30:584
1875107992220,2cyclictest2182562-21kworker/u16:0+flush-8:009:55:384
1875109992117,3cyclictest1996680-21cat08:05:066
1875108992118,2cyclictest1889155-21kworker/u16:1+flush-8:007:30:425
1875108992116,4cyclictest1884829-21latency_hist07:10:115
1875108992114,6cyclictest0-21swapper/512:20:535
1875107992119,2cyclictest2114154-21kworker/u16:3+events_unbound09:19:524
1875107992119,2cyclictest2075514-21kworker/u16:0+flush-8:009:05:404
1875107992119,2cyclictest1936627-21kworker/u16:2+events_unbound07:55:264
187511099200,18cyclictest0-21swapper/711:16:547
1875107992018,2cyclictest2436667-21kworker/u16:1+flush-8:012:30:384
1875107992018,2cyclictest2075746-21kworker/u16:2+flush-8:009:00:314
1875107992016,3cyclictest2104747-21cat09:00:104
1875110991916,2cyclictest0-21swapper/712:00:387
187511099190,18cyclictest0-21swapper/711:59:237
187511099190,17cyclictest0-21swapper/711:45:377
187511099190,17cyclictest0-21swapper/711:45:377
1875109991917,2cyclictest1913464-21kworker/u16:4+flush-8:007:50:116
1875109991915,3cyclictest901-21in:imjournal08:25:116
1875108991915,3cyclictest2514975-21latency_hist12:30:105
1875107991917,2cyclictest2271156-21kworker/u16:2+events_unbound11:55:224
1875107991917,2cyclictest2182562-21kworker/u16:0+events_unbound09:53:564
1875107991917,2cyclictest1996548-21kworker/u16:3+events_unbound08:32:214
1875107991917,2cyclictest1947228-21kworker/u16:0+flush-8:008:00:264
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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