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2024-02-24 - 01:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Sat Feb 24, 2024 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
14973662427,30sleep70-21swapper/719:06:387
14973662427,30sleep70-21swapper/719:06:387
149723123827,8sleep40-21swapper/419:04:434
149723123827,8sleep40-21swapper/419:04:434
1497661993634,2cyclictest1811034-21kworker/u16:2+events_unbound22:03:584
149729823525,7sleep50-21swapper/519:05:405
149729823525,7sleep50-21swapper/519:05:405
1497661993431,2cyclictest1520895-21kworker/u16:2+flush-8:020:04:074
1497668993130,0cyclictest0-21swapper/722:12:407
1497668993130,0cyclictest0-21swapper/721:47:257
1497661993028,2cyclictest1752664-21kworker/u16:0+events_unbound22:27:414
1497668992827,0cyclictest0-21swapper/721:52:287
1497668992827,0cyclictest0-21swapper/720:33:397
1497668992827,0cyclictest0-21swapper/720:12:427
1497668992827,0cyclictest0-21swapper/719:32:337
1497661992826,2cyclictest1478018-21kworker/u16:4+events_unbound19:52:294
1497661992725,2cyclictest2108631-21kworker/u16:2+events_unbound00:32:284
1497661992725,2cyclictest1848421-21kworker/u16:3+events_unbound22:07:254
148806022715,8sleep60-21swapper/619:02:206
148806022715,8sleep60-21swapper/619:02:206
1497668992625,0cyclictest0-21swapper/721:43:157
149766899260,1cyclictest0-21swapper/720:25:047
1497668992524,0cyclictest0-21swapper/723:57:137
1497668992524,0cyclictest0-21swapper/723:27:277
1497668992524,0cyclictest0-21swapper/721:27:297
1497668992524,0cyclictest0-21swapper/721:22:387
1497668992423,0cyclictest0-21swapper/723:02:247
1497668992423,0cyclictest0-21swapper/722:37:417
1497668992423,0cyclictest0-21swapper/721:41:597
1497668992423,0cyclictest0-21swapper/721:41:597
1497668992423,0cyclictest0-21swapper/721:12:447
1497666992420,3cyclictest1520895-21kworker/u16:2+events_unbound20:22:056
1497663992422,2cyclictest2089439-21kworker/u16:0+flush-8:000:27:355
1497661992422,2cyclictest1963680-21kworker/u16:1+flush-8:023:04:064
1497661992422,2cyclictest1963680-21kworker/u16:1+events_unbound23:22:344
1497668992322,0cyclictest0-21swapper/700:07:397
1497668992221,0cyclictest0-21swapper/720:48:487
1497668992221,0cyclictest0-21swapper/719:27:247
1497668992221,0cyclictest0-21swapper/719:27:247
1497668992221,0cyclictest0-21swapper/700:12:437
1497663992220,2cyclictest1478018-21kworker/u16:4+events_unbound19:09:045
1497663992218,3cyclictest1478018-21kworker/u16:4+events_unbound19:22:395
1497663992218,3cyclictest1478018-21kworker/u16:4+events_unbound19:22:395
1497661992220,2cyclictest1848421-21kworker/u16:3+events_unbound22:37:374
1497661992220,2cyclictest1732915-21kworker/u16:5+events_unbound21:12:344
1497661992220,2cyclictest1617300-21kworker/u16:3+flush-8:020:27:264
1497661992219,2cyclictest1696181-21kworker/u16:1+events_unbound21:02:304
1497668992120,0cyclictest0-21swapper/723:17:217
1497668992120,0cyclictest0-21swapper/722:06:487
1497668992120,0cyclictest0-21swapper/721:04:027
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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