You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-04-26 - 16:06
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot2.osadl.org (updated Fri Apr 26, 2024 12:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
304467125520,30sleep70-21swapper/707:05:127
2679189450,39rtkit-daemon0-21swapper/407:06:104
3045247993433,0cyclictest0-21swapper/711:08:547
304490923221,8sleep60-21swapper/607:08:316
3045247993124,6cyclictest0-21swapper/708:08:527
304481722717,7sleep50-21swapper/507:07:185
3045247992625,0cyclictest0-21swapper/710:03:537
35691232250,1chrt0-21swapper/711:38:547
3045242992521,3cyclictest3294324-21latency_hist09:18:396
3045237992520,4cyclictest3206296-21latency_hist08:33:394
3045247992320,2cyclictest0-21swapper/708:59:317
3045247992320,2cyclictest0-21swapper/708:59:317
3045237992319,3cyclictest3165358-21kworker/u16:0+events_unbound09:18:544
3045239992220,2cyclictest3186357-21kworker/u16:4+flush-8:009:23:395
3045239992217,4cyclictest3186055-21cat08:18:395
3045242992117,3cyclictest3665594-21latency_hist12:28:386
3045237992119,2cyclictest3025251-21kworker/u16:3+flush-8:007:49:304
3045237992116,4cyclictest3391978-21latency_hist10:08:404
3045247992019,0cyclictest0-21swapper/707:34:107
3045237992017,2cyclictest3043959-21kworker/u16:2+flush-8:007:29:104
3045237992015,4cyclictest3499433-21cat11:03:334
3045247991918,0cyclictest0-21swapper/710:53:517
3045237991917,2cyclictest3226198-21kworker/u16:2+flush-8:008:59:044
3045237991917,2cyclictest3226198-21kworker/u16:2+flush-8:008:59:044
3045237991915,3cyclictest3043959-21kworker/u16:2+flush-8:007:14:114
3045247991817,0cyclictest0-21swapper/709:59:047
3045239991814,3cyclictest3025251-21kworker/u16:3+flush-8:007:59:105
304524799174,5cyclictest0-21swapper/709:29:567
304524799174,5cyclictest0-21swapper/708:19:307
3045247991716,0cyclictest0-21swapper/711:48:397
304524799170,1cyclictest0-21swapper/708:49:037
3045242991713,3cyclictest3558176-21latency_hist11:33:396
304523799170,16cyclictest3411796-21sed10:18:394
304524799164,5cyclictest0-21swapper/708:04:357
304524799162,6cyclictest0-21swapper/711:28:057
3045247991615,0cyclictest0-21swapper/711:58:537
3045247991615,0cyclictest0-21swapper/707:29:117
3045247991615,0cyclictest0-21swapper/707:19:037
3045247991615,0cyclictest0-21swapper/707:09:047
304524799156,8cyclictest0-21swapper/712:13:377
304524799156,8cyclictest0-21swapper/711:57:277
304524799153,5cyclictest0-21swapper/709:06:017
304524799152,6cyclictest0-21swapper/711:17:177
3045247991514,0cyclictest0-21swapper/708:38:547
3045247991513,1cyclictest0-21swapper/712:33:387
3045247991513,1cyclictest0-21swapper/710:28:587
304524799150,13cyclictest0-21swapper/710:11:277
304524299157,8cyclictest0-21swapper/608:42:156
3045242991513,2cyclictest3323968-21kworker/u16:1+flush-8:009:54:056
3045242991510,4cyclictest3655948-21cat12:23:396
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional