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2022-05-26 - 22:27

x86 Intel Core i9-9900K @3600 MHz, Linux 5.15.2-rt19 (Profile)

Latency plot of system in rack #0, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot3.osadl.org (updated Thu May 26, 2022 12:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4335132348307,13sleep80-21swapper/807:05:0614
4368052346326,14sleep150-21swapper/1507:08:107
4367772346327,13sleep120-21swapper/1207:07:514
4367472346324,14sleep70-21swapper/707:07:3013
4367442345308,13sleep50-21swapper/507:07:2911
4369242343303,13sleep60-21swapper/607:09:5312
4368032339319,13sleep130-21swapper/1307:08:085
4366862338318,14sleep140-21swapper/1407:06:486
4368352337318,13sleep100-21swapper/1007:08:382
4368182337317,14sleep110-21swapper/1107:08:223
4368092336295,14sleep20-21swapper/207:08:138
4368792335315,14sleep00-21swapper/007:09:160
4366942335315,13sleep30-21swapper/307:06:549
4366912333314,13sleep10-21swapper/107:06:521
4369222332311,14sleep40-21swapper/407:09:5210
4367012332313,13sleep90-21swapper/907:07:0015
4529522590,0sleep140-21swapper/1407:25:136
7750532350,0sleep00-21swapper/011:31:390
6126722340,0sleep00-21swapper/009:55:010
6423252320,0sleep150-21swapper/1510:11:177
7705902300,0sleep150-21swapper/1511:30:027
7774792290,0sleep50-21swapper/511:34:2511
43713099287,21cyclictest0-21swapper/907:34:3215
7975242270,0sleep80-21swapper/811:45:2414
7931782270,0sleep30-21swapper/311:43:429
6198432270,0sleep90-21swapper/909:59:1115
4772842260,0sleep20-21swapper/207:55:118
437128992626,0cyclictest0-21swapper/710:04:3113
437128992626,0cyclictest0-21swapper/710:04:3013
6345122250,0sleep90-21swapper/910:06:3915
43713499240,13cyclictest0-21swapper/1112:31:303
43713499220,22cyclictest0-21swapper/1109:35:463
43713499220,22cyclictest0-21swapper/1109:24:473
43713499220,11cyclictest0-21swapper/1110:52:393
43713499220,11cyclictest0-21swapper/1109:13:483
43713499220,11cyclictest0-21swapper/1108:07:553
437134992110,11cyclictest0-21swapper/1111:14:363
43713499210,10cyclictest0-21swapper/1108:18:533
43713199200,0cyclictest0-21swapper/1007:40:112
43712999201,19cyclictest0-21swapper/810:14:0714
437124992010,10cyclictest0-21swapper/307:33:599
43714199190,1cyclictest0-21swapper/1311:06:115
43714199190,1cyclictest0-21swapper/1307:25:115
43713199197,12cyclictest0-21swapper/1007:32:542
43713199190,16cyclictest0-21swapper/1009:35:132
43712699190,19cyclictest0-21swapper/511:40:1811
43712499190,14cyclictest0-21swapper/308:40:589
43712299190,1cyclictest0-21swapper/110:24:091
437145991818,0cyclictest0-21swapper/1507:10:097
43714599180,0cyclictest0-21swapper/1509:40:027
437144991818,0cyclictest0-21swapper/1407:37:246
43714199180,0cyclictest0-21swapper/1311:35:215
43713999180,18cyclictest0-21swapper/1209:38:594
43713499185,13cyclictest0-21swapper/1112:20:313
43713499185,13cyclictest0-21swapper/1110:41:393
43713499184,14cyclictest0-21swapper/1112:09:323
43713499184,14cyclictest0-21swapper/1111:03:383
43713499184,14cyclictest0-21swapper/1111:03:383
43713499184,14cyclictest0-21swapper/1109:46:453
43713499184,14cyclictest0-21swapper/1109:02:493
43713499184,14cyclictest0-21swapper/1108:51:513
437131991817,1cyclictest0-21swapper/1011:00:252
437131991817,1cyclictest0-21swapper/1011:00:242
43713099180,1cyclictest0-21swapper/911:24:4015
43713099180,18cyclictest0-21swapper/910:27:5415
43713099180,0cyclictest0-21swapper/910:51:5715
437129991818,0cyclictest721rcuc/812:25:1214
43712999181,17cyclictest0-21swapper/811:44:2314
43712999181,17cyclictest0-21swapper/811:09:0914
43712999180,18cyclictest0-21swapper/809:14:3514
437128991817,1cyclictest0-21swapper/707:10:1013
43712899180,18cyclictest0-21swapper/709:36:4413
437126991818,0cyclictest0-21swapper/510:59:3711
437126991818,0cyclictest0-21swapper/509:20:2311
43712699180,18cyclictest0-21swapper/511:36:0011
43712699180,18cyclictest0-21swapper/510:44:2711
43712699180,18cyclictest0-21swapper/510:15:0611
43712699180,18cyclictest0-21swapper/510:08:2911
43712699180,18cyclictest0-21swapper/509:39:5211
43712699180,0cyclictest0-21swapper/512:38:5011
43712699180,0cyclictest0-21swapper/511:45:0111
43712699180,0cyclictest0-21swapper/509:11:5711
437125991818,0cyclictest0-21swapper/410:40:3310
43712599180,18cyclictest0-21swapper/412:31:2210
43712599180,18cyclictest0-21swapper/410:07:4510
43712599180,18cyclictest0-21swapper/407:10:1110
43712599180,0cyclictest0-21swapper/411:10:2810
437144991717,0cyclictest0-21swapper/1407:10:046
43714199170,17cyclictest0-21swapper/1311:31:185
43714199170,17cyclictest0-21swapper/1311:28:165
43714199170,17cyclictest0-21swapper/1311:04:055
43714199170,17cyclictest0-21swapper/1311:04:045
43714199170,17cyclictest0-21swapper/1310:43:205
43714199170,17cyclictest0-21swapper/1310:35:005
43714199170,17cyclictest0-21swapper/1310:01:485
43714199170,17cyclictest0-21swapper/1310:01:475
43714199170,17cyclictest0-21swapper/1307:59:215
43714199170,14cyclictest0-21swapper/1311:46:015
43714199170,14cyclictest0-21swapper/1310:21:215
43714199170,14cyclictest0-21swapper/1310:14:315
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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