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2022-12-05 - 02:47

x86 Intel Core i9-9900K @3600 MHz, Linux 5.15.2-rt19 (Profile)

Latency plot of system in rack #0, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100, highest latencies:
System rack0slot3.osadl.org (updated Mon Dec 05, 2022 00:46:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10796372375369,4sleep110-21swapper/1119:07:093
10797482355315,13sleep130-21swapper/1319:08:325
10795282342321,14sleep120-21swapper/1219:05:344
10798482340321,13sleep100-21swapper/1019:09:332
10797602340319,14sleep60-21swapper/619:08:4112
10795302340321,13sleep140-21swapper/1419:05:366
10796002339319,14sleep80-21swapper/819:06:3414
10797402337316,14sleep50-21swapper/519:08:2311
10795972337316,14sleep70-21swapper/719:06:3313
10795562337318,13sleep30-21swapper/319:05:579
10797442335317,12sleep90-21swapper/919:08:2815
10796072335314,14sleep150-21swapper/1519:06:417
10797752334314,14sleep10-21swapper/119:08:511
10795572332312,14sleep40-21swapper/419:05:5710
10798292331312,13sleep00-21swapper/019:09:220
10796972331310,13sleep20-21swapper/219:07:488
1080121998017,21cyclictest0-21swapper/1123:37:063
1080121997817,41cyclictest0-21swapper/1119:36:363
1080121997635,21cyclictest111650irq/131-enp2s0-22:37:303
1080121997310,21cyclictest0-21swapper/1121:10:503
1080121997014,21cyclictest0-21swapper/1122:14:523
108012199631,20cyclictest0-21swapper/1120:03:383
108012199630,42cyclictest0-21swapper/1120:48:213
108012199630,42cyclictest0-21swapper/1120:36:103
108012199630,42cyclictest0-21swapper/1120:36:103
108012199630,42cyclictest0-21swapper/1120:10:323
108012199610,20cyclictest0-21swapper/1100:17:143
108012199610,18cyclictest0-21swapper/1119:58:403
108012199590,59cyclictest0-21swapper/1122:22:093
1080121995838,20cyclictest0-21swapper/1123:08:403
1080121995817,21cyclictest0-21swapper/1120:28:293
1080121995816,21cyclictest0-21swapper/1122:26:443
1080121995816,21cyclictest0-21swapper/1100:36:373
1080121995813,21cyclictest0-21swapper/1123:18:343
1080121995813,21cyclictest0-21swapper/1100:30:093
1080121995712,21cyclictest0-21swapper/1123:04:043
1080121995712,21cyclictest0-21swapper/1100:07:163
1080121995612,42cyclictest0-21swapper/1123:10:523
1080121995612,42cyclictest0-21swapper/1123:10:523
1080121995611,21cyclictest0-21swapper/1123:27:323
1080121995611,21cyclictest0-21swapper/1121:52:403
1080121995515,20cyclictest0-21swapper/1122:06:003
1080121995514,21cyclictest0-21swapper/1123:46:483
1080121995510,21cyclictest0-21swapper/1122:57:103
1080121995414,20cyclictest0-21swapper/1121:35:243
1080121995413,41cyclictest0-21swapper/1100:10:133
1080121995413,41cyclictest0-21swapper/1100:10:133
1080121995413,21cyclictest0-21swapper/1123:21:503
1080121995413,21cyclictest0-21swapper/1122:49:383
1080121995413,21cyclictest0-21swapper/1122:49:383
1080121995413,21cyclictest0-21swapper/1121:20:263
1080121995412,42cyclictest0-21swapper/1123:50:063
1080121995412,21cyclictest0-21swapper/1100:21:143
1080121995313,20cyclictest0-21swapper/1100:03:493
1080121995312,21cyclictest0-21swapper/1123:30:223
1080121995312,21cyclictest0-21swapper/1122:00:213
1080121995311,21cyclictest0-21swapper/1123:58:183
1080121995311,21cyclictest0-21swapper/1121:46:303
108011999533,25cyclictest0-21swapper/900:10:2615
108011999533,25cyclictest0-21swapper/900:10:2615
1080114995353,0cyclictest0-21swapper/423:30:5210
1080121995211,21cyclictest0-21swapper/1120:20:183
1080121995210,21cyclictest0-21swapper/1122:52:243
108012199516,21cyclictest0-21swapper/1121:25:073
108012199516,21cyclictest0-21swapper/1121:03:503
1080121995110,21cyclictest0-21swapper/1121:57:423
1080121995110,21cyclictest0-21swapper/1121:17:083
108012199509,21cyclictest0-21swapper/1123:40:563
108012199509,21cyclictest0-21swapper/1122:43:103
108012199509,21cyclictest0-21swapper/1122:43:103
108012199509,21cyclictest0-21swapper/1122:30:563
108012199509,21cyclictest0-21swapper/1122:15:143
108012199509,21cyclictest0-21swapper/1121:42:043
108012199509,21cyclictest0-21swapper/1100:25:333
108012199505,21cyclictest0-21swapper/1119:50:183
108012199499,20cyclictest0-21swapper/1121:34:583
108012199498,21cyclictest0-21swapper/1119:45:223
108012199494,21cyclictest0-21swapper/1120:30:343
108012199494,21cyclictest0-21swapper/1120:07:243
108012199487,21cyclictest0-21swapper/1119:26:593
108012199487,21cyclictest0-21swapper/1119:10:543
108012199483,21cyclictest0-21swapper/1120:53:203
108012199483,21cyclictest0-21swapper/1120:42:223
108012199476,21cyclictest0-21swapper/1120:59:503
108012199476,21cyclictest0-21swapper/1120:16:463
108012199476,21cyclictest0-21swapper/1119:40:253
108012199473,20cyclictest0-21swapper/1119:19:543
108012199465,21cyclictest0-21swapper/1119:31:103
108012199462,20cyclictest0-21swapper/1119:23:123
108012199454,21cyclictest0-21swapper/1121:05:503
1080129994111,30cyclictest0-21swapper/1320:22:255
108012999399,30cyclictest0-21swapper/1319:56:015
108011999350,10cyclictest0-21swapper/919:57:4915
108011999350,10cyclictest0-21swapper/919:35:5115
1080116993534,1cyclictest1469253-21cat00:15:2512
1080113993534,1cyclictest982541-21kworker/3:219:10:239
12581132340,0sleep140-21swapper/1422:00:106
108011999330,8cyclictest0-21swapper/921:47:3915
1080129993211,21cyclictest1178696-21diskmemload22:06:245
1080129993211,21cyclictest0-21swapper/1322:37:385
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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