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2023-03-29 - 02:43

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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x86 Intel Core i7-4960X @3600 MHz, Linux 5.15.2-rt19 (Profile)

Latency plot of shadow in rack #0, slot #3
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot3s.osadl.org (updated Wed Mar 29, 2023 00:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
854386994490,449cyclictest0-21swapper/300:29:553
85438699445442,3cyclictest869268-21turbostat19:35:003
85438699444443,1cyclictest0-21swapper/323:34:553
85440199442442,0cyclictest0-21swapper/700:34:557
85440199442441,1cyclictest0-21swapper/719:54:597
85438699442442,0cyclictest0-21swapper/320:09:553
85438699442441,0cyclictest0-21swapper/323:39:553
85438699442438,3cyclictest973852-21turbostat22:45:013
85440199440440,0cyclictest874991-21turbostat19:49:547
85438699440440,0cyclictest0-21swapper/323:54:553
85440199439437,1cyclictest920574-21munin-run21:05:007
85440199437437,0cyclictest1022355-21turbostat00:14:547
85438699437435,1cyclictest863572-21turbostat19:25:003
85438699436435,1cyclictest0-21swapper/300:04:553
85440199435435,0cyclictest959619-21turbostat22:24:567
85438699435433,1cyclictest979576-21turbostat22:55:013
85437799434434,0cyclictest0-21swapper/023:12:400
85438699431430,1cyclictest0-21swapper/319:39:553
85440199428426,2cyclictest872091-21turbostat19:44:547
85440199428426,1cyclictest0-21swapper/721:45:017
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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