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2024-02-24 - 17:29

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot3s.osadl.org (updated Sat Feb 24, 2024 00:45:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
323169999731729,2cyclictest3249822-21kworker/2:1+events21:24:212
323169999681679,2cyclictest3236569-21kworker/2:0+i915-unordered19:35:432
323169999671671,0cyclictest3262209-21kworker/2:2+events22:20:442
323170199481480,1cyclictest0-21swapper/321:54:543
3231714994790,10cyclictest0-21swapper/723:26:437
3231707994795,14cyclictest0-21swapper/500:11:435
3231699994798,15cyclictest0-21swapper/220:24:192
3231699994798,15cyclictest0-21swapper/220:24:192
3231696994782,30cyclictest0-21swapper/122:57:291
3231707994771,474cyclictest0-21swapper/521:08:395
3231696994770,475cyclictest0-21swapper/121:17:511
3231694994773,14cyclictest0-21swapper/000:17:440
323171499476476,0cyclictest3255913-21kworker/7:2+i915-unordered21:54:557
3231714994760,10cyclictest0-21swapper/719:11:227
323170799476476,0cyclictest3268530-21kworker/5:1+events00:27:215
3231699994768,15cyclictest0-21swapper/223:46:212
3231699994768,15cyclictest0-21swapper/223:46:202
3231699994768,15cyclictest0-21swapper/220:58:192
3231699994764,29cyclictest0-21swapper/220:13:532
32316999947611,14cyclictest0-21swapper/223:55:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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