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2025-04-29 - 12:58

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot3s.osadl.org (updated Tue Apr 29, 2025 00:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12690462260216,13sleep00-21swapper/019:09:410
12689422252230,19sleep10-21swapper/119:08:141
12687302252213,11sleep70-21swapper/719:05:317
12688742250213,13sleep20-21swapper/219:07:192
12688672250243,5sleep40-21swapper/419:07:124
12688842249213,28sleep30-21swapper/319:07:273
12690162244236,5sleep60-21swapper/619:09:156
12688262239229,6sleep50-21swapper/519:06:415
1269382993632,2cyclictest0-21swapper/700:19:077
1269376993533,2cyclictest1367446-21awk22:20:145
126936199350,34cyclictest0-21swapper/021:36:310
1269373993432,2cyclictest0-21swapper/423:03:314
1269371993433,1cyclictest1426-21snmpd00:32:383
1269378993332,1cyclictest1426-21snmpd23:35:386
1269376993333,0cyclictest0-21swapper/520:15:535
1269371993333,0cyclictest0-21swapper/319:42:363
126937199330,32cyclictest2962432-21kworker/3:2+mm_percpu_wq00:20:173
1269378993232,0cyclictest0-21swapper/623:16:086
1269378993231,1cyclictest1426-21snmpd22:41:576
1269371993232,0cyclictest0-21swapper/320:45:303
1269371993131,0cyclictest0-21swapper/323:18:493
1269371993131,0cyclictest0-21swapper/322:44:553
1269371993131,0cyclictest0-21swapper/320:09:043
126936599319,1cyclictest0-21swapper/123:54:391
1269382993027,2cyclictest0-21swapper/723:52:337
1269371993030,0cyclictest0-21swapper/323:12:393
1269371993030,0cyclictest0-21swapper/322:13:083
1269371993030,0cyclictest0-21swapper/321:55:023
1269371993030,0cyclictest0-21swapper/320:17:483
1269371993030,0cyclictest0-21swapper/319:57:223
1269371993030,0cyclictest0-21swapper/319:47:033
126937199300,30cyclictest0-21swapper/323:34:173
1269376992929,0cyclictest0-21swapper/522:01:125
1269376992929,0cyclictest0-21swapper/519:47:105
126937699290,29cyclictest0-21swapper/520:52:565
1269371992929,0cyclictest0-21swapper/323:23:283
1269371992929,0cyclictest0-21swapper/322:28:133
1269371992929,0cyclictest0-21swapper/322:08:363
1269371992929,0cyclictest0-21swapper/321:04:313
1269371992929,0cyclictest0-21swapper/300:27:483
126937199280,28cyclictest0-21swapper/300:18:413
1269367992828,0cyclictest0-21swapper/222:38:522
1269378992726,1cyclictest1426-21snmpd21:04:066
1269378992725,2cyclictest1426-21snmpd21:31:106
1269373992726,1cyclictest1426-21snmpd21:36:314
126937199274,22cyclictest0-21swapper/322:50:133
1269367992727,0cyclictest0-21swapper/222:17:482
1269367992727,0cyclictest0-21swapper/220:13:302
1269367992727,0cyclictest0-21swapper/200:29:242
1269361992726,1cyclictest1258189-21kworker/0:0+events20:06:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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