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2025-07-14 - 21:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot4.osadl.org (updated Mon Jul 14, 2025 00:46:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19362692371363,5sleep40-21swapper/419:09:0910
19362462359314,15sleep150-21swapper/1519:08:487
19361952358313,36sleep70-21swapper/719:08:0813
19361942356312,15sleep60-21swapper/619:08:0712
19360092354310,16sleep100-21swapper/1019:06:022
19360072353309,14sleep80-21swapper/819:06:0014
19362112351328,15sleep50-21swapper/519:08:2111
19359962346321,16sleep140-21swapper/1419:05:506
19362772343321,14sleep110-21swapper/1119:09:163
19361112342331,7sleep130-21swapper/1319:07:085
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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