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2022-01-16 - 11:04

Intel(R) Core(TM) i3-4360 CPU @ 3.70GHz, Linux 5.14.2-rt21 (Profile)

Latency plot of system in rack #0, slot #4
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot4.osadl.org (updated Sun Jan 16, 2022 00:43:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
796295212184,30sleep20-21swapper/219:07:222
796240211884,28sleep30-21swapper/319:06:423
796371211568,39sleep00-21swapper/019:08:200
796441211383,23sleep10-21swapper/119:09:131
796776998710,45cyclictest0-21swapper/022:38:070
796777998613,42cyclictest0-21swapper/100:33:061
796776998410,40cyclictest0-21swapper/021:28:060
79677699839,42cyclictest0-21swapper/023:03:070
9852122820,0sleep00-21swapper/023:56:030
796777998110,41cyclictest0-21swapper/100:08:071
79677699819,42cyclictest0-21swapper/021:08:070
79677699789,39cyclictest0-21swapper/019:23:060
79677699770,43cyclictest0-21swapper/021:53:060
79677699768,40cyclictest0-21swapper/019:48:070
796776997511,41cyclictest0-21swapper/020:08:060
79677699750,42cyclictest0-21swapper/020:23:060
79677699710,42cyclictest0-21swapper/020:43:070
79677999640,63cyclictest0-21swapper/300:15:203
796777996463,1cyclictest853442-21sensors21:15:291
796776996411,43cyclictest0-21swapper/020:33:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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