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2023-02-08 - 06:02

x86 Intel Core i7-3770K @3500 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Wed Feb 08, 2023 00:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12250342400363,28sleep120-21swapper/1219:05:354
12250342400363,28sleep120-21swapper/1219:05:354
12250972339320,11sleep150-21swapper/1519:06:277
12250972339320,11sleep150-21swapper/1519:06:277
12249982333315,10sleep80-21swapper/819:05:1514
12249982333315,10sleep80-21swapper/819:05:1514
12247592328306,12sleep50-21swapper/519:01:5911
12247592328306,12sleep50-21swapper/519:01:5911
12219042328309,10sleep90-21swapper/919:01:3115
12219042328309,10sleep90-21swapper/919:01:3115
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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