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2024-07-27 - 03:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Sat Jul 27, 2024 00:43:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
250363799632631,1cyclictest0-21swapper/623:03:2412
250364899629628,1cyclictest0-21swapper/923:27:2415
250362899605604,1cyclictest0-21swapper/320:48:039
250362899539539,0cyclictest0-21swapper/323:47:259
250362899539539,0cyclictest0-21swapper/323:47:259
2503648995344,27cyclictest0-21swapper/901:05:2515
2503618995333,528cyclictest226298350irq/142-enp3s0-rx-123:29:000
25036629953118,512cyclictest0-21swapper/1223:22:004
25036679953056,473cyclictest0-21swapper/1301:54:225
25036309952913,25cyclictest0-21swapper/421:26:0310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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