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2023-06-01 - 12:19

x86 Intel Core i7-3770K @3500 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot5.osadl.org (updated Thu Jun 01, 2023 00:43:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20856972372366,3sleep70-21swapper/718:59:4213
20856482370364,3sleep150-21swapper/1518:59:027
20827822358353,3sleep140-21swapper/1418:58:296
20859022349330,10sleep100-21swapper/1019:02:422
20856532338301,11sleep20-21swapper/218:59:058
20856932337300,11sleep30-21swapper/318:59:389
20856812337299,10sleep80-21swapper/818:59:2714
20857972336330,3sleep00-21swapper/019:01:120
20827812335316,10sleep130-21swapper/1318:58:285
20857562333315,10sleep120-21swapper/1219:00:364
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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