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2022-08-15 - 18:25

x86 Intel Core i7-3770K @3500 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #0, slot #5
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100, highest latencies:
System rack0slot5.osadl.org (updated Mon Aug 15, 2022 00:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3260552310291,10sleep70-21swapper/719:08:1813
3262552308288,10sleep50-21swapper/519:09:0511
3252092292274,10sleep130-21swapper/1319:04:565
3260652290272,11sleep100-21swapper/1019:08:212
3252792287268,10sleep120-21swapper/1219:05:114
3253942283264,11sleep110-21swapper/1119:05:423
3256252279260,10sleep20-21swapper/219:06:378
3256152262242,12sleep150-21swapper/1519:06:347
3259072215209,3sleep60-21swapper/619:07:4512
3255742145127,10sleep40-21swapper/419:06:2310
3261502131121,5sleep00-21swapper/019:08:430
3257572130112,10sleep140-21swapper/1419:07:056
326659991040,29cyclictest0-21swapper/919:24:0715
378920970,23pipewire-pulse0-21swapper/119:32:281
32541929392,0sleep10-21swapper/119:05:481
32662599880,13cyclictest0-21swapper/219:24:078
32666499870,28cyclictest378820pipewire19:32:282
326642998612,74cyclictest183-21kswapd019:32:2812
326618998619,67cyclictest0-21swapper/019:32:280
32668099798,28cyclictest0-21swapper/1419:24:076
32665999773,74cyclictest0-21swapper/919:32:2815
326684997415,29cyclictest0-21swapper/1519:32:287
32626327260,6sleep80-21swapper/819:09:0814
326623997070,0cyclictest3321-21Xorg19:24:071
326637996941,28cyclictest0-21swapper/519:24:0811
326651996536,29cyclictest0-21swapper/819:24:0714
326618996565,0cyclictest3321-21Xorg19:24:070
326673996420,44cyclictest0-21swapper/1219:32:284
326664996464,0cyclictest3321-21Xorg19:24:072
326646995958,1cyclictest3321-21Xorg19:32:2813
326676995757,0cyclictest3321-21Xorg19:24:085
32526925540,6sleep90-21swapper/919:05:0815
32662999520,0cyclictest0-21swapper/319:32:289
4532092510,0sleep120-21swapper/1221:17:034
4166642500,0sleep120-21swapper/1220:41:174
137099500,0ntpd0-21swapper/920:46:3415
326668994949,0cyclictest3321-21Xorg19:32:283
326646994820,28cyclictest0-21swapper/719:24:0813
326651994545,0cyclictest3321-21Xorg19:32:2814
326684994343,0cyclictest50450irq/141-i91519:24:077
326680994141,0cyclictest3321-21Xorg19:32:286
32664699414,26cyclictest0-21swapper/720:16:5113
32610023836,1sleep30-21swapper/319:08:309
32663499330,33cyclictest304261-21libvirtd19:24:0710
326642993232,0cyclictest3321-21Xorg19:24:0712
326668993131,0cyclictest3321-21Xorg19:24:083
326625993131,0cyclictest3321-21Xorg19:32:298
326651993010,0cyclictest0-21swapper/800:20:0014
326637993030,0cyclictest519-21usb-storage19:32:2811
326629992929,0cyclictest0-21swapper/319:24:089
32664699284,11cyclictest0-21swapper/722:39:3813
32664699283,25cyclictest0-21swapper/722:17:4013
32664699283,25cyclictest0-21swapper/721:00:4713
326646992816,12cyclictest122150irq/137-enp3s0-19:43:5413
326634992828,0cyclictest3321-21Xorg19:32:2810
326634992827,1cyclictest0-21swapper/400:00:4910
32665199270,26cyclictest890247-21Isolated08:47:0314
326676992525,0cyclictest0-21swapper/1319:32:285
32667399250,15cyclictest0-21swapper/1221:55:374
32664699255,20cyclictest0-21swapper/700:20:3013
326646992514,11cyclictest122150irq/137-enp3s0-20:27:5013
32668499240,14cyclictest0-21swapper/1523:32:197
32668099240,14cyclictest0-21swapper/1423:20:506
32668099240,13cyclictest0-21swapper/1423:04:536
32667399240,14cyclictest0-21swapper/1200:22:024
32664699240,14cyclictest0-21swapper/723:20:4113
32664699240,14cyclictest0-21swapper/719:38:1113
32664699240,14cyclictest0-21swapper/700:38:2413
32664699240,13cyclictest0-21swapper/720:39:4113
32668499230,13cyclictest0-21swapper/1522:37:017
32666499230,13cyclictest0-21swapper/1021:41:242
32663499230,13cyclictest0-21swapper/419:10:2910
32668499220,12cyclictest0-21swapper/1523:20:067
326680992212,10cyclictest888751-21Renderer00:26:336
32668099220,12cyclictest0-21swapper/1423:57:596
32668099220,12cyclictest0-21swapper/1400:14:326
326676992213,9cyclictest888751-21Renderer20:41:595
32667699220,12cyclictest0-21swapper/1323:10:355
32664699220,8cyclictest0-21swapper/720:05:5213
32664699220,8cyclictest0-21swapper/720:05:5213
32664699220,12cyclictest0-21swapper/723:17:3613
32664699220,12cyclictest0-21swapper/720:58:4113
32663499220,12cyclictest0-21swapper/422:05:4810
32662599220,12cyclictest0-21swapper/221:05:158
326680992120,0cyclictest981-21systemd-resolve19:45:016
326680992120,0cyclictest981-21systemd-resolve19:45:016
32667399214,10cyclictest0-21swapper/1223:26:364
326673992121,0cyclictest0-21swapper/1222:13:284
326673992111,10cyclictest0-21swapper/1221:33:414
32667399210,11cyclictest0-21swapper/1221:47:254
326664992111,0cyclictest0-21swapper/1022:25:102
326651992111,10cyclictest0-21swapper/822:04:4814
32664699210,21cyclictest0-21swapper/721:55:2613
32663799210,11cyclictest0-21swapper/520:40:2911
32663799210,11cyclictest0-21swapper/519:47:4311
32663799210,11cyclictest0-21swapper/519:47:4311
32663499210,11cyclictest0-21swapper/422:58:5410
326623992111,10cyclictest0-21swapper/121:37:111
326623992111,10cyclictest0-21swapper/120:03:451
326623992111,10cyclictest0-21swapper/120:03:451
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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