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2024-10-09 - 05:27

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot5s.osadl.org (updated Wed Oct 09, 2024 00:46:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
37399222367323,13sleep120-21swapper/1219:08:254
37399132363321,13sleep40-21swapper/419:08:1710
37398872358352,4sleep130-21swapper/1319:07:545
37397242355313,13sleep140-21swapper/1419:05:306
37399482354311,13sleep10-21swapper/119:08:461
37399352353309,14sleep50-21swapper/519:08:3411
37371802352306,13sleep80-21swapper/819:05:0914
37398852351307,14sleep110-21swapper/1119:07:523
37398282344324,13sleep70-21swapper/719:07:0013
37398472342322,13sleep90-21swapper/919:07:1915
37398182342322,13sleep150-21swapper/1519:06:527
37399662338318,13sleep20-21swapper/219:09:058
37397652337317,13sleep30-21swapper/319:06:099
37400252336316,13sleep60-21swapper/619:09:5612
37399572336316,13sleep100-21swapper/1019:08:572
37398202329310,13sleep00-21swapper/019:06:530
374036499467,25cyclictest0-21swapper/1322:43:045
374036499457,25cyclictest0-21swapper/1323:59:565
374036499456,13cyclictest0-21swapper/1320:09:185
3740342994326,17cyclictest1417-21snmpd21:39:5213
3740332994342,1cyclictest1417-21snmpd23:27:4210
3740332994342,1cyclictest0-21swapper/421:37:1210
3740325994339,4cyclictest0-21swapper/220:56:578
374035899420,0cyclictest0-21swapper/1100:17:443
3740337994138,1cyclictest0-21swapper/622:17:1012
3740367994039,1cyclictest1417-21snmpd22:27:106
3740358994023,1cyclictest1417-21snmpd23:02:263
3740347994039,1cyclictest1417-21snmpd23:33:5414
3740347994039,1cyclictest1417-21snmpd22:07:2814
3740361993938,1cyclictest0-21swapper/1221:20:004
374034299390,0cyclictest0-21swapper/719:28:5413
3740322993937,1cyclictest1417-21snmpd23:07:551
374032299380,37cyclictest0-21swapper/122:11:321
3740367993736,1cyclictest1417-21snmpd00:09:266
374036499370,31cyclictest0-21swapper/1300:30:145
3740358993737,0cyclictest0-21swapper/1121:20:413
3740330993736,1cyclictest1417-21snmpd22:34:269
3740322993737,0cyclictest0-21swapper/100:04:551
3740322993735,2cyclictest0-21swapper/120:56:571
3740364993635,1cyclictest0-21swapper/1321:40:395
3740356993635,1cyclictest1417-21snmpd19:13:322
374035699360,0cyclictest0-21swapper/1020:44:282
3740347993535,0cyclictest0-21swapper/820:20:1114
3740347993535,0cyclictest0-21swapper/800:03:1014
3740320993534,1cyclictest0-21swapper/019:33:080
3740320993533,1cyclictest1417-21snmpd22:56:020
3740347993434,0cyclictest0-21swapper/822:43:0914
3740320993434,0cyclictest0-21swapper/019:45:340
374036499339,11cyclictest0-21swapper/1319:25:215
3740361993325,8cyclictest0-21swapper/1223:09:004
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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