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2024-07-13 - 20:54

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot5s.osadl.org (updated Sat Jul 13, 2024 00:45:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6546912415406,7sleep00-21swapper/019:07:330
6547262407399,5sleep150-21swapper/1519:08:037
6546602407401,4sleep50-21swapper/519:07:0511
6546662404397,5sleep100-21swapper/1019:07:102
6546752402395,5sleep20-21swapper/219:07:198
6548262400394,4sleep60-21swapper/619:09:3012
6546582400394,4sleep30-21swapper/319:07:049
6548352399392,5sleep140-21swapper/1419:09:386
6547932398392,4sleep80-21swapper/819:09:0014
6547922397390,4sleep70-21swapper/719:08:5913
6547502397391,4sleep40-21swapper/419:08:2410
6547242397391,4sleep130-21swapper/1319:08:015
6546682397391,4sleep120-21swapper/1219:07:124
6547022395389,4sleep110-21swapper/1119:07:433
6546012394388,4sleep10-21swapper/119:06:131
6546282393387,4sleep90-21swapper/919:06:3715
655156993231,0cyclictest0-21swapper/1319:11:305
65515599300,27cyclictest0-21swapper/1223:05:164
655153993030,0cyclictest0-21swapper/1019:11:302
655154992926,2cyclictest1803-21snmpd21:05:133
655154992925,4cyclictest1803-21snmpd21:12:133
65514399290,28cyclictest0-21swapper/021:49:140
655162992826,1cyclictest1803-21snmpd23:58:507
65515699286,0cyclictest0-21swapper/1322:15:545
65515699286,0cyclictest0-21swapper/1322:15:545
65515499280,27cyclictest0-21swapper/1123:00:443
65515399280,27cyclictest0-21swapper/1023:25:152
65515399280,27cyclictest0-21swapper/1022:27:242
65515299280,27cyclictest0-21swapper/919:54:0415
65515299280,27cyclictest0-21swapper/900:16:0315
655151992827,1cyclictest1803-21snmpd20:37:3014
655151992827,1cyclictest0-21swapper/820:40:0314
655151992825,2cyclictest0-21swapper/821:18:0714
65515199280,27cyclictest0-21swapper/822:31:2414
65515199280,27cyclictest0-21swapper/819:53:4714
655150992827,1cyclictest661080-21ethtool19:15:1613
655149992827,1cyclictest1803-21snmpd20:17:1512
65514999280,27cyclictest0-21swapper/622:57:3012
655148992827,1cyclictest1803-21snmpd00:18:1211
655146992827,1cyclictest1803-21snmpd21:51:089
655146992827,1cyclictest0-21swapper/322:40:519
65514599280,27cyclictest0-21swapper/222:54:228
655144992827,1cyclictest0-21swapper/120:28:561
655143992827,1cyclictest0-21swapper/000:15:360
65514399280,27cyclictest0-21swapper/020:56:090
65516299270,1cyclictest0-21swapper/1522:33:187
65516299270,1cyclictest0-21swapper/1519:40:137
65515799270,27cyclictest0-21swapper/1422:06:246
655155992726,1cyclictest1803-21snmpd22:00:234
655155992726,1cyclictest1803-21snmpd19:10:184
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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