You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-02-26 - 14:11
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot6.osadl.org (updated Mon Feb 26, 2024 00:46:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3456029955715,29cyclictest0-21swapper/721:23:2113
3456029955715,29cyclictest0-21swapper/721:23:2113
3456029955331,0cyclictest0-21swapper/721:47:2013
34560299545516,29cyclictest0-21swapper/721:30:2313
34560299545516,29cyclictest0-21swapper/721:30:2213
3456129954220,521cyclictest0-21swapper/1019:32:532
3456029954022,518cyclictest0-21swapper/723:48:4313
345602995328,521cyclictest0-21swapper/719:45:2113
3456109953031,29cyclictest0-21swapper/919:10:4615
3456179952637,488cyclictest0-21swapper/1220:27:424
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional