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2024-07-27 - 07:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot6.osadl.org (updated Sat Jul 27, 2024 00:46:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
56918099733732,1cyclictest0-21swapper/1200:26:434
5691559958232,45cyclictest0-21swapper/521:50:2211
5691619957322,45cyclictest0-21swapper/700:14:4413
569161995708,45cyclictest0-21swapper/723:57:5813
5691559957030,29cyclictest0-21swapper/519:14:4411
5691619956413,29cyclictest0-21swapper/719:40:4513
5691519955620,45cyclictest0-21swapper/419:49:2010
5691719955418,45cyclictest0-21swapper/1022:23:582
569190995479,536cyclictest0-21swapper/1521:13:197
5691769954524,0cyclictest0-21swapper/1123:40:553
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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