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2024-05-25 - 03:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot6.osadl.org (updated Sat May 25, 2024 00:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15804009960034,45cyclictest0-21swapper/721:28:4513
15804099956518,517cyclictest0-21swapper/1023:27:232
15803989955736,491cyclictest0-21swapper/623:58:5912
15804009955332,521cyclictest0-21swapper/700:29:5513
15804099955231,521cyclictest0-21swapper/1021:50:222
15804099954953,495cyclictest0-21swapper/1019:36:462
15804239954624,522cyclictest0-21swapper/1300:10:595
15804239954624,521cyclictest0-21swapper/1320:42:595
15803989954625,0cyclictest0-21swapper/621:08:4212
15804009954020,520cyclictest0-21swapper/720:26:4413
15803989954018,520cyclictest0-21swapper/600:00:4612
15804009953816,521cyclictest0-21swapper/719:47:2213
15804239953715,522cyclictest0-21swapper/1300:09:235
15804009953615,519cyclictest0-21swapper/720:00:2313
15803989953617,519cyclictest0-21swapper/621:21:2212
15804099953137,491cyclictest0-21swapper/1023:18:582
15804099953131,498cyclictest0-21swapper/1019:12:212
1580390995290,528cyclictest0-21swapper/420:34:4210
1580390995290,528cyclictest0-21swapper/420:34:4210
1580388995299,0cyclictest0-21swapper/322:42:449
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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