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2026-05-18 - 11:25

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot6s.osadl.org (updated Mon May 18, 2026 00:46:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28742062262255,4sleep30-21swapper/319:08:5413
28741952251244,4sleep140-21swapper/1419:08:446
28741892251244,4sleep80-21swapper/819:08:3718
28740932236215,12sleep160-21swapper/1619:07:258
28709742236216,13sleep180-21swapper/1819:05:0810
28741922234226,5sleep110-21swapper/1119:08:413
28741902234217,9sleep90-21swapper/919:08:3919
28742362232211,13sleep190-21swapper/1919:09:1011
28740452228220,5sleep20-21swapper/219:06:5212
28742592225205,12sleep170-21swapper/1719:09:279
28739502224205,12sleep50-21swapper/519:05:5515
28741732223215,5sleep130-21swapper/1319:08:235
28739672222204,11sleep150-21swapper/1519:06:047
28742072220201,12sleep40-21swapper/419:08:5514
28740142218199,12sleep70-21swapper/719:06:3617
28742092216195,13sleep60-21swapper/619:08:5716
28740752216174,35sleep10-21swapper/119:07:111
28709652216196,13sleep120-21swapper/1219:05:024
28742882215198,11sleep100-21swapper/1019:09:412
287418126551,8sleep00-21swapper/019:08:290
2874737995858,0cyclictest0-21swapper/1721:41:569
287474399420,41cyclictest0-21swapper/1921:24:5911
2874717993730,5cyclictest0-21swapper/1121:07:583
2874707993735,1cyclictest1700472-21CPU19
287470799370,36cyclictest1700471-21CPU19
2874701993733,3cyclictest0-21swapper/719:54:5917
287470799360,35cyclictest0-21swapper/920:49:5919
287470599360,34cyclictest1700472-21CPU18
2874701993633,3cyclictest0-21swapper/722:03:5917
2874685993630,6cyclictest0-21swapper/221:07:5912
2874743993531,4cyclictest0-21swapper/1920:02:5811
287473399350,34cyclictest1700471-21CPU8
2874728993533,1cyclictest1700472-21CPU6
2874728993533,1cyclictest1700472-21CPU6
287472699350,34cyclictest1700472-21CPU5
2874707993535,0cyclictest0-21swapper/919:59:5919
287470799350,35cyclictest0-21swapper/921:48:5819
287470799350,35cyclictest0-21swapper/921:33:5919
287470599350,0cyclictest0-21swapper/821:30:5918
287469999350,34cyclictest1700471-21CPU16
2874692993533,1cyclictest1700472-21CPU14
287473399340,33cyclictest0-21swapper/1620:08:588
287473399340,33cyclictest0-21swapper/1619:26:598
287473199340,1cyclictest1700471-21CPU7
287473199340,1cyclictest1700471-21CPU7
287472899340,33cyclictest1700471-21CPU6
287472899340,33cyclictest0-21swapper/1419:56:596
287472699340,33cyclictest1700472-21CPU5
2874707993434,0cyclictest0-21swapper/922:51:5919
2874707993434,0cyclictest0-21swapper/921:04:5919
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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