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2024-04-26 - 18:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Fri Apr 26, 2024 00:45:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15586542217167,40sleep150-21swapper/1519:08:237
15586002173154,10sleep50-21swapper/519:07:5811
15585562164144,9sleep60-21swapper/619:07:2712
19769201610,159pipewire-pulse0-21swapper/219:06:208
14832812155142,7sleep110-21swapper/1119:05:073
1558634215047,101sleep140-21swapper/1419:08:066
15584802140121,10sleep100-21swapper/1019:07:142
15586922114112,1sleep120-21swapper/1219:08:534
19769201130,110pipewire-pulse0-21swapper/119:07:481
19769201070,105pipewire-pulse0-21swapper/919:07:2015
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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