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2024-07-27 - 07:25

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack0slot7s.osadl.org (updated Sat Jul 27, 2024 00:43:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3023080212272,20sleep30-21swapper/319:09:313
3022902212070,39sleep10-21swapper/119:07:561
3022727211962,21sleep20-21swapper/219:06:252
3022708211768,19sleep00-21swapper/019:06:150
3023268999917,42cyclictest0-21swapper/121:09:451
302326899260,25cyclictest0-21swapper/100:38:111
3023276992413,10cyclictest0-21swapper/323:00:213
302327699232,20cyclictest0-21swapper/321:36:203
302326899230,15cyclictest0-21swapper/121:36:391
3023276992112,8cyclictest0-21swapper/321:42:033
302327699206,6cyclictest1944026-21pool-ibus-x1119:45:173
302326899207,1cyclictest0-21swapper/119:51:381
302327699190,18cyclictest0-21swapper/319:54:053
302327699189,9cyclictest0-21swapper/323:17:513
302327699180,17cyclictest0-21swapper/323:05:473
302327699175,11cyclictest0-21swapper/321:30:223
302327699170,16cyclictest0-21swapper/321:51:503
302327699170,16cyclictest0-21swapper/321:16:563
302327699170,16cyclictest0-21swapper/320:03:263
302327699170,12cyclictest0-21swapper/320:50:523
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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