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2024-07-19 - 04:36

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #7

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot7s.osadl.org (updated Fri Jul 19, 2024 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3660203211367,39sleep00-21swapper/019:07:360
3658474210665,14sleep20-21swapper/219:05:102
3659956210373,22sleep10-21swapper/119:05:531
3659949210071,21sleep30-21swapper/319:05:513
366071199330,33cyclictest0-21swapper/320:47:353
366070199270,3cyclictest0-21swapper/022:26:170
366070799262,24cyclictest0-21swapper/200:30:212
3660707992615,11cyclictest41-21ksoftirqd/220:15:172
3660707992613,13cyclictest0-21swapper/223:40:162
3660711992521,4cyclictest0-21swapper/300:04:293
3660707992412,12cyclictest0-21swapper/223:30:172
366070799240,24cyclictest0-21swapper/220:43:422
143599230,0ntpd3717925-21ntpq21:10:161
366071199229,13cyclictest0-21swapper/300:39:133
3660707992018,2cyclictest1038-21snmpd23:16:502
3660705992012,8cyclictest0-21swapper/120:00:141
366070599200,20cyclictest0-21swapper/121:07:071
3660701992011,9cyclictest0-21swapper/021:45:110
3660707991910,4cyclictest0-21swapper/222:37:002
366070599190,3cyclictest0-21swapper/123:25:251
3660701991911,8cyclictest0-21swapper/020:10:230
366071199185,13cyclictest0-21swapper/323:57:003
366071199181,17cyclictest0-21swapper/323:18:353
366070799187,8cyclictest0-21swapper/200:01:352
3660707991815,2cyclictest1038-21snmpd21:08:222
366070799180,1cyclictest0-21swapper/219:31:282
366070599180,2cyclictest0-21swapper/123:12:101
3660711991713,4cyclictest0-21swapper/321:51:193
366071199170,1cyclictest0-21swapper/323:06:103
366070799172,15cyclictest0-21swapper/219:26:552
366070799170,1cyclictest0-21swapper/221:45:152
366070799170,1cyclictest0-21swapper/219:20:122
366070799170,1cyclictest0-21swapper/219:14:042
366070799170,17cyclictest0-21swapper/221:56:402
366070799170,12cyclictest0-21swapper/223:21:312
366070599171,15cyclictest0-21swapper/120:41:211
366070599170,2cyclictest0-21swapper/120:36:231
366070599170,16cyclictest0-21swapper/121:44:521
366070599170,16cyclictest0-21swapper/121:20:161
366070199170,1cyclictest0-21swapper/022:12:080
366070199170,17cyclictest0-21swapper/023:23:470
366070199170,16cyclictest0-21swapper/021:27:140
366070199170,16cyclictest0-21swapper/019:58:500
3660711991615,1cyclictest3668981-21awk19:25:103
3660711991614,1cyclictest1038-21snmpd22:51:403
3660711991612,4cyclictest0-21swapper/322:24:353
366071199160,7cyclictest0-21swapper/322:57:153
366071199160,1cyclictest0-21swapper/320:50:073
366071199160,16cyclictest0-21swapper/319:15:363
366070799167,9cyclictest0-21swapper/219:56:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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