You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2023-01-29 - 17:56

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #0, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  

x86 Intel Core i7-X990 @3470 MHz, Linux 5.10.47-rt46 (Profile)

Latency plot of shadow in rack #0, slot #8
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q --smi
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack0slot8s.osadl.org (updated Sun Jan 29, 2023 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2998911040,94ptp4l0-21swapper/107:05:451
917801000,95rtkit-daemon0-21swapper/407:07:366
2339626252,8sleep50-21swapper/507:08:397
2322326251,9sleep70-21swapper/707:06:059
2325226050,8sleep100-21swapper/1007:06:312
2322225846,10sleep60-21swapper/607:06:048
2322725745,10sleep110-21swapper/1107:06:083
2320325443,9sleep00-21swapper/007:05:460
255272490,0sleep90-21swapper/907:50:2211
305122230,0sleep30-21swapper/310:45:245
42112220,0sleep70-21swapper/709:30:199
299891210,0ptp4l0-21swapper/108:45:261
2385999202,14cyclictest0-21swapper/410:10:016
2384399204,9cyclictest0-21swapper/112:30:011
2384399204,9cyclictest0-21swapper/112:30:001
127012200,0sleep40-21swapper/409:00:016
2386899192,12cyclictest13663-21kworker/u24:012:10:018
2384899191,17cyclictest0-21swapper/207:25:254
299891180,1ptp4l21-21ksoftirqd/111:15:321
299891180,0ptp4l0-21swapper/111:45:271
2386899181,13cyclictest0-21swapper/608:10:018
2384399185,8cyclictest0-21swapper/109:09:591
2384399183,9cyclictest0-21swapper/111:55:001
2384399182,9cyclictest0-21swapper/110:55:001
2384399181,13cyclictest0-21swapper/109:20:001
2383899183,10cyclictest0-21swapper/012:25:010
2383899183,10cyclictest0-21swapper/012:25:000
299891170,1ptp4l21-21ksoftirqd/108:55:291
299891170,0ptp4l0-21swapper/108:30:361
2384399173,8cyclictest0-21swapper/110:40:011
2383899173,8cyclictest0-21swapper/011:55:000
299891160,1ptp4l21-21ksoftirqd/110:05:191
299891160,0ptp4l0-21swapper/109:55:331
2389699163,8cyclictest0-21swapper/1111:45:003
2387399160,15cyclictest27595-21irqrtprio08:35:239
2387399160,15cyclictest23526-21unixbench_multi09:10:309
2387399160,15cyclictest22901-21cut10:35:249
2386899163,8cyclictest0-21swapper/611:15:008
2386899163,8cyclictest0-21swapper/611:00:008
2386899162,9cyclictest0-21swapper/608:20:028
2386899162,8cyclictest0-21swapper/611:25:018
2386899161,9cyclictest27503-21kworker/u24:209:40:018
2385999161,5cyclictest0-21swapper/411:10:016
2385999160,2cyclictest0-21swapper/412:15:216
2383899163,8cyclictest0-21swapper/011:40:010
299891150,7ptp4l21-21ksoftirqd/107:30:201
299891150,1ptp4l21-21ksoftirqd/107:21:361
299891150,0ptp4l0-21swapper/110:45:311
299891150,0ptp4l0-21swapper/110:15:261
299891150,0ptp4l0-21swapper/110:10:241
299891150,0ptp4l0-21swapper/108:50:181
299891150,0ptp4l0-21swapper/108:00:271
299891150,0ptp4l0-21swapper/107:45:211
2389699152,10cyclictest0-21swapper/1109:50:013
2387399150,3cyclictest29825-21sendmail_mailqu11:25:339
2387399150,14cyclictest9655-21cat10:20:019
2387399150,14cyclictest3451-21date09:30:009
2387399150,14cyclictest31022-21gltestperf12:10:199
2387399150,14cyclictest30054-21latency_hist10:05:019
2387399150,14cyclictest22416-21cpuspeed_turbos12:00:199
2387399150,14cyclictest16630-21date09:05:019
2387399150,14cyclictest12711-21cat12:30:009
2387399150,14cyclictest12711-21cat12:30:009
2387399150,14cyclictest1156-21cut08:00:269
2386899153,7cyclictest0-21swapper/608:25:008
2386899152,8cyclictest0-21swapper/611:30:018
2386899152,7cyclictest0-21swapper/608:00:028
2384899153,9cyclictest0-21swapper/209:20:004
2384899151,13cyclictest0-21swapper/212:30:294
2384899151,13cyclictest0-21swapper/212:30:294
2384399152,8cyclictest0-21swapper/112:14:321
2384399152,8cyclictest0-21swapper/107:45:001
23843991513,1cyclictest20858-21turbostat10:34:591
233042157,6sleep80-21swapper/807:07:1810
125052150,1sleep71026-21runrttasks07:35:199
299891140,6ptp4l0-21swapper/111:40:221
299891140,1ptp4l21-21ksoftirqd/112:20:171
299891140,1ptp4l21-21ksoftirqd/112:20:161
299891140,1ptp4l21-21ksoftirqd/111:10:281
299891140,0ptp4l0-21swapper/110:25:281
299891140,0ptp4l0-21swapper/109:35:281
274632140,0sleep110-21swapper/1107:55:013
2388699140,7cyclictest7947-21cat10:15:2411
2387399140,8cyclictest3599-21cstates08:05:179
2387399140,8cyclictest0-21swapper/710:25:219
2387399140,1cyclictest0-21swapper/710:21:509
2387399140,13cyclictest9550-21timerandwakeup108:10:309
2387399140,13cyclictest8581-21sh12:25:019
2387399140,13cyclictest8581-21sh12:25:019
2387399140,13cyclictest8216-21sed11:00:009
2387399140,13cyclictest4572-21chrt08:47:149
2387399140,13cyclictest4056-21latency_hist07:25:009
2387399140,13cyclictest3991-21grep11:35:229
2387399140,13cyclictest28720-21gltestperf07:55:239
2387399140,13cyclictest26542-21sed11:20:329
2387399140,13cyclictest18407-21cut09:05:239
2387399140,13cyclictest12432-21tune2fs09:40:189
2387399140,13cyclictest11070-21expr08:15:179
2387399140,13cyclictest0-21swapper/710:30:209
2387399140,13cyclictest0-21swapper/707:15:179
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional