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2025-06-24 - 18:29

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot8s.osadl.org (updated Tue Jun 24, 2025 12:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
275991840,74ptp4l0-21swapper/107:06:591
275991840,74ptp4l0-21swapper/107:06:581
760927059,9sleep50-21swapper/507:05:307
760927059,9sleep50-21swapper/507:05:307
149002690,0sleep651-21ksoftirqd/610:45:208
788526553,9sleep00-21swapper/007:09:390
788526553,9sleep00-21swapper/007:09:390
769526456,6sleep110-21swapper/1107:06:483
769526456,6sleep110-21swapper/1107:06:483
777126352,9sleep70-21swapper/707:07:589
777126352,9sleep70-21swapper/707:07:579
770326352,9sleep60-21swapper/607:06:578
770326352,9sleep60-21swapper/607:06:568
764926353,8sleep40-21swapper/407:06:056
764926353,8sleep40-21swapper/407:06:056
778926251,9sleep100-21swapper/1007:08:132
778926251,9sleep100-21swapper/1007:08:122
82452540,0sleep70-21swapper/709:55:149
94980230,5rtkit-daemon0-21swapper/807:09:3710
94980230,5rtkit-daemon0-21swapper/807:09:3710
827999193,10cyclictest0-21swapper/610:45:008
827999185,9cyclictest29349-21kworker/u24:009:20:018
827999183,9cyclictest0-21swapper/610:35:008
827999183,10cyclictest0-21swapper/609:59:598
825699183,9cyclictest0-21swapper/111:10:011
825699180,17cyclictest0-21swapper/107:20:191
826599173,9cyclictest0-21swapper/311:00:015
825099173,9cyclictest0-21swapper/009:35:010
830399163,8cyclictest0-21swapper/1107:20:013
830399163,8cyclictest0-21swapper/1107:20:003
828399163,8cyclictest0-21swapper/712:05:009
828399162,9cyclictest0-21swapper/709:55:019
828399161,14cyclictest0-21swapper/708:20:189
827499162,9cyclictest29349-21kworker/u24:009:05:017
827499162,9cyclictest0-21swapper/510:40:007
825699163,9cyclictest0-21swapper/109:50:011
825699162,9cyclictest0-21swapper/107:45:001
825099163,7cyclictest0-21swapper/010:20:000
275991160,1ptp4l21-21ksoftirqd/112:25:201
275991160,1ptp4l21-21ksoftirqd/110:25:211
275991160,1ptp4l21-21ksoftirqd/108:10:191
830399150,14cyclictest0-21swapper/1109:35:193
828399154,7cyclictest0-21swapper/707:35:009
828399152,9cyclictest0-21swapper/710:50:289
827999152,8cyclictest0-21swapper/610:40:008
827999152,8cyclictest0-21swapper/609:40:018
827999152,8cyclictest0-21swapper/607:40:018
827499153,7cyclictest0-21swapper/511:05:007
826599153,7cyclictest0-21swapper/311:10:325
825699153,8cyclictest0-21swapper/109:05:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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