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2024-04-19 - 23:45

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #0, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot8s.osadl.org (updated Fri Apr 19, 2024 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
288991950,85ptp4l0-21swapper/107:07:451
2216227564,9sleep110-21swapper/1107:07:183
2117327355,9sleep40-21swapper/407:05:226
2233427160,9sleep50-21swapper/507:09:477
94480700,65rtkit-daemon0-21swapper/007:08:260
2134226451,10sleep60-21swapper/607:05:238
1987126143,15sleep100-21swapper/1007:05:162
2232225839,10sleep70-21swapper/707:09:379
185732540,0sleep40-21swapper/410:35:216
2272299400,3cyclictest0-21swapper/1008:35:242
2272299350,1cyclictest0-21swapper/1007:55:222
2272299250,1cyclictest0-21swapper/1009:35:142
2269299232,16cyclictest0-21swapper/411:45:006
2269299222,15cyclictest0-21swapper/411:05:016
2268399223,12cyclictest0-21swapper/212:35:004
2269299211,15cyclictest0-21swapper/410:35:006
2267099210,20cyclictest0-21swapper/007:55:160
288991200,0ptp4l0-21swapper/111:10:181
2268399203,11cyclictest0-21swapper/208:40:014
2271199193,9cyclictest0-21swapper/809:00:0010
2270799190,14cyclictest0-21swapper/708:35:259
288991180,0ptp4l0-21swapper/111:30:181
288991180,0ptp4l0-21swapper/109:40:231
2272799181,10cyclictest0-21swapper/1107:50:003
2270799183,9cyclictest0-21swapper/711:15:009
2268899183,10cyclictest0-21swapper/310:10:005
2268399183,10cyclictest0-21swapper/210:10:014
2267099182,9cyclictest0-21swapper/007:35:000
2267099181,3cyclictest0-21swapper/009:35:150
288991170,1ptp4l21-21ksoftirqd/108:15:161
288991170,1ptp4l21-21ksoftirqd/108:15:151
288991170,1ptp4l14390-21cat11:55:141
2272299170,3cyclictest0-21swapper/1011:25:172
2271199172,9cyclictest0-21swapper/809:30:0110
2270199171,12cyclictest6955-21kworker/u24:111:10:008
2269899172,2cyclictest0-21swapper/511:20:007
2269899170,2cyclictest0-21swapper/512:20:157
2268899173,8cyclictest0-21swapper/311:45:015
2268899173,8cyclictest0-21swapper/309:00:015
2268899172,9cyclictest0-21swapper/311:55:005
2268399173,9cyclictest0-21swapper/207:15:014
2267099172,10cyclictest0-21swapper/009:55:010
322842160,0sleep90-21swapper/911:35:2011
288991160,0ptp4l0-21swapper/112:25:251
288991160,0ptp4l0-21swapper/107:40:231
288991160,0ptp4l0-21swapper/107:35:231
288991160,0ptp4l0-21swapper/107:20:161
2272299160,15cyclictest0-21swapper/1009:54:562
2271699162,9cyclictest0-21swapper/910:05:0011
2271699161,3cyclictest0-21swapper/908:20:1711
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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