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2026-05-10 - 11:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Sun May 10, 2026 00:45:20)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
177222213148,22sleep20-21swapper/219:09:592
173932213150,51sleep00-21swapper/019:05:430
173862202163,25sleep30-21swapper/319:05:383
175502198161,24sleep10-21swapper/119:07:451
93112590,0sleep10-21swapper/123:58:371
239632560,0sleep00-21swapper/019:20:140
83432160,1sleep228-21ksoftirqd/223:14:372
1780099150,14cyclictest0-21swapper/123:50:181
320932140,0sleep10-21swapper/119:35:201
1780099140,14cyclictest0-21swapper/123:30:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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