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2023-09-25 - 13:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Mon Sep 25, 2023 00:45:21)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
70042234159,25sleep00-21swapper/019:06:120
70012231158,57sleep20-21swapper/219:06:092
71012212150,22sleep30-21swapper/319:07:273
72612209172,24sleep10-21swapper/119:09:311
26812560,7sleep261250irq/122-eno123:44:122
251492170,0sleep10-21swapper/122:15:211
7404991513,1cyclictest28-21ksoftirqd/200:19:592
7404991512,2cyclictest28-21ksoftirqd/200:30:192
310352150,0sleep10-21swapper/123:00:181
7404991311,1cyclictest28-21ksoftirqd/223:24:592
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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