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2024-04-14 - 20:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Sun Apr 14, 2024 00:45:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
318062214156,46sleep10-21swapper/119:06:381
317302200161,25sleep20-21swapper/219:05:382
320382199162,24sleep00-21swapper/019:09:370
319472197160,24sleep30-21swapper/319:08:283
247472660,0sleep20-21swapper/223:20:112
157642550,0sleep30-21swapper/322:25:013
75242230,0sleep10-21swapper/100:24:541
3216499140,13cyclictest27801-21fschecks_time22:40:122
3214599143,5cyclictest2081-21/usr/sbin/munin19:15:000
217342140,0sleep10-21swapper/123:15:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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