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2024-04-27 - 02:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Sat Apr 27, 2024 00:45:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
132792230160,55sleep20-21swapper/219:09:352
131702216154,21sleep00-21swapper/019:08:080
130642202145,44sleep30-21swapper/319:06:483
130452197160,25sleep10-21swapper/119:06:331
74432710,0sleep00-21swapper/023:25:020
88232130,0sleep10-21swapper/123:25:231
48912110,0sleep30-21swapper/321:50:403
1340299110,9cyclictest0-21swapper/222:47:242
181962100,0sleep36058-21diskmemload00:24:123
13402991010,0cyclictest0-21swapper/221:18:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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