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2025-07-15 - 16:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack1slot1.osadl.org (updated Tue Jul 15, 2025 12:45:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
670324760,5sleep26707-21wc07:05:242
71652212162,24sleep30-21swapper/307:07:393
73242205151,42sleep10-21swapper/107:09:431
72242202122,21sleep00-21swapper/007:08:250
187742770,0sleep10-21swapper/110:15:081
77692660,0sleep10-21swapper/107:10:131
299572180,1sleep2467-21diskmemload10:30:002
173172160,0sleep00-21swapper/009:30:140
7442991412,1cyclictest9-21ksoftirqd/011:00:000
745199130,12cyclictest0-21swapper/111:40:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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