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2021-10-24 - 01:16

Intel(R) Core(TM) i5-7300U CPU @ 2.60GHz, Linux 5.0.21-rt16 (Profile)

Latency plot of system in rack #1, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Sat Oct 23, 2021 12:45:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
165282207154,40sleep10-21swapper/107:05:571
167902200160,26sleep00-21swapper/007:09:210
166472200161,26sleep30-21swapper/307:07:323
166662199161,25sleep20-21swapper/207:07:472
210942760,0sleep00-21swapper/011:55:000
286212670,1sleep028624-21gltestperf09:35:190
70382600,0sleep20-21swapper/209:10:182
52022150,0sleep10-21swapper/109:05:241
267612150,1sleep121-21ksoftirqd/112:00:191
16953991412,1cyclictest6177-21diskmemload10:41:293
16953991312,1cyclictest0-21swapper/312:35:343
16953991312,1cyclictest0-21swapper/312:25:173
16953991312,1cyclictest0-21swapper/312:12:213
16953991312,1cyclictest0-21swapper/311:14:133
16953991312,1cyclictest0-21swapper/310:47:403
16953991312,1cyclictest0-21swapper/310:15:273
16953991311,2cyclictest0-21swapper/309:25:153
1695399127,5cyclictest0-21swapper/308:30:163
1695399124,5cyclictest32669-21needreboot11:30:203
1695399123,1cyclictest6177-21diskmemload10:33:183
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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