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2019-07-17 - 00:29

Intel(R) Core(TM) i5-7300U CPU @ 2.60GHz, Linux 5.0.19-rt11 (Profile)

Latency plot of system in rack #1, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Tue Jul 16, 2019 12:45:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
96322217156,47sleep20-21swapper/207:07:252
98012198161,25sleep30-21swapper/307:09:363
95362197160,24sleep00-21swapper/007:06:110
96682195158,25sleep10-21swapper/107:07:521
998299154,4cyclictest243-21systemd-journal10:08:212
998299142,1cyclictest243-21systemd-journal09:18:112
998299141,5cyclictest243-21systemd-journal12:33:502
998299141,2cyclictest243-21systemd-journal07:32:502
996199143,5cyclictest25999-21sed07:45:010
998299130,5cyclictest243-21systemd-journal11:18:362
998299130,2cyclictest243-21systemd-journal11:38:402
998299120,5cyclictest243-21systemd-journal09:53:182
9961991211,1cyclictest101rcuc/012:08:160
9961991211,1cyclictest101rcuc/010:30:160
996199118,1cyclictest101rcuc/007:40:010
996199114,6cyclictest8028-21perf09:30:010
996199114,4cyclictest2581-21sed08:05:010
996199113,5cyclictest243-21systemd-journal11:46:350
9961991111,0cyclictest101rcuc/007:20:120
9961991110,1cyclictest101rcuc/011:40:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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