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2022-10-04 - 08:25

x86 Intel Core i5-7300U @2600 MHz, Linux 5.0.21-rt16 (Profile)

Latency plot of system in rack #1, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Tue Oct 04, 2022 00:45:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
171272223149,25sleep00-21swapper/019:09:540
168302208158,40sleep30-21swapper/319:06:033
170202199162,25sleep20-21swapper/219:08:322
167962199159,27sleep10-21swapper/119:05:381
218812930,1sleep31724699cyclictest23:50:003
296872650,0sleep10-21swapper/100:33:361
90392230,0sleep00-21swapper/022:24:590
260292200,1sleep31724699cyclictest20:40:003
197532160,0sleep10-21swapper/123:10:251
17229991212,0cyclictest0-21swapper/000:09:550
17246991110,1cyclictest19425-21awk19:15:003
1723999119,1cyclictest28-21ksoftirqd/221:25:332
17239991110,1cyclictest28-21ksoftirqd/223:30:242
1723999110,11cyclictest0-21swapper/222:37:542
17234991111,0cyclictest111rcu_preempt20:20:141
1723499110,7cyclictest111rcu_preempt23:37:021
1724699109,0cyclictest13951-21/usr/sbin/munin22:30:223
1723999100,2cyclictest361-21systemd-journal23:25:002
1723499109,1cyclictest21-21ksoftirqd/123:29:371
1723499109,1cyclictest21-21ksoftirqd/122:35:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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