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2024-07-13 - 08:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot1.osadl.org (updated Sat Jul 13, 2024 00:45:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
313342205158,32sleep30-21swapper/319:09:103
311892198154,22sleep20-21swapper/219:07:152
292912198159,26sleep00-21swapper/019:05:090
313072196159,24sleep10-21swapper/119:08:481
2242721190,0sleep10-21swapper/121:50:271
132492750,0sleep00-21swapper/019:35:260
92792630,0sleep00-21swapper/019:30:010
3152599140,14cyclictest0-21swapper/121:03:361
30002130,0sleep30-21swapper/322:55:143
182412130,0sleep324675-21diskmemload22:30:233
54572120,0sleep05461-21gltestperf19:20:150
3153299126,4cyclictest61250irq/122-eno120:30:132
3153299109,1cyclictest28-21ksoftirqd/221:35:422
3153299100,1cyclictest27745-21run-parts21:59:262
3152599100,4cyclictest0-21swapper/122:00:101
315409990,2cyclictest0-21swapper/322:40:113
315329998,1cyclictest0-21swapper/222:09:192
315329994,2cyclictest530-21systemd-logind20:05:292
315259991,5cyclictest0-21swapper/119:25:101
315259990,8cyclictest0-21swapper/120:13:391
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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