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2024-07-27 - 07:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Sat Jul 27, 2024 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
271800,0ktimersoftd/220703-21perf18:48:532
2748223521,0sleep00-21swapper/018:44:550
2754323425,0sleep10-21swapper/118:45:401
2751622824,0sleep30-21swapper/318:45:223
329970,0watchdog/30-21swapper/323:48:233
329970,0watchdog/30-21swapper/321:39:233
29925070,0irq/32-eth0-rx-0-21swapper/323:32:363
29925070,0irq/32-eth0-rx-0-21swapper/323:17:383
29925070,0irq/32-eth0-rx-0-21swapper/323:10:373
29925070,0irq/32-eth0-rx-0-21swapper/321:32:473
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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