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2024-04-20 - 07:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Sat Apr 20, 2024 00:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
333025142,0sleep10-21swapper/118:54:041
302424131,0sleep30-21swapper/318:50:413
303323526,0sleep20-21swapper/218:50:482
322623423,0sleep00-21swapper/018:52:550
35079960,0cyclictest0-21swapper/122:08:161
35069966,0cyclictest0-21swapper/021:48:570
35160,0ktimersoftd/30-21swapper/320:35:243
339960,0migration/37716-21sh22:40:533
339960,0migration/3706-21timerandwakeup22:55:263
339960,0migration/33050-21aten_r1power_en23:00:153
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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