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2025-07-15 - 23:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Tue Jul 15, 2025 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1774623828,0sleep30-21swapper/306:27:233
1774623828,0sleep30-21swapper/306:27:233
17853993737,0cyclictest3466-21md0_resync10:25:510
1769623725,0sleep20-21swapper/206:26:462
1769623725,0sleep20-21swapper/206:26:462
1752523525,0sleep10-21swapper/106:24:531
1752523525,0sleep10-21swapper/106:24:531
1748322925,0sleep00-21swapper/006:24:240
1748322925,0sleep00-21swapper/006:24:240
8315080,0irq/26-0000:00:0-21swapper/309:28:133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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