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2026-08-14 - 10:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot2.osadl.org (updated Fri Aug 14, 2026 00:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
226626160,0sleep30-21swapper/319:28:223
218424940,0sleep20-21swapper/219:27:252
2788124535,0sleep10-21swapper/119:25:161
224723127,0sleep00-21swapper/019:28:110
339970,0migration/32451-21irqrtprio00:50:273
35160,0ktimersoftd/30-21swapper/322:50:303
339960,0migration/316015-21kthreadcore00:00:273
339960,0migration/312324-21sh22:41:463
29815060,0irq/29-eth0-tx-10012-21munin-node19:35:230
29805060,0irq/28-eth0-rx-32471-21head21:40:253
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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