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2024-04-24 - 02:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot2.osadl.org (updated Wed Apr 24, 2024 00:43:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2738624736,0sleep00-21swapper/018:51:110
2759224331,0sleep30-21swapper/318:53:383
2749123526,0sleep20-21swapper/218:52:252
2737723525,0sleep10-21swapper/118:51:041
27769991111,0cyclictest0-21swapper/020:55:010
4160,0ktimersoftd/023527-21ssh22:02:180
339960,0migration/39310-21timerwakeupswit21:15:193
339960,0migration/36697-21sh21:53:363
339960,0migration/36697-21sh21:53:363
339960,0migration/331610-21munin-node20:50:123
339960,0migration/329179-21sh21:45:253
339960,0migration/321287-21sh21:42:363
339960,0migration/314652-21kthreadcore19:55:063
29935060,0irq/33-eth0-tx-15650-21ssh23:12:402
29935060,0irq/33-eth0-tx-0-21swapper/200:13:112
29925060,0irq/32-eth0-rx-25899-21fschecks_count23:20:043
29925060,0irq/32-eth0-rx-22974-21cut20:00:063
29925060,0irq/32-eth0-rx-16082-40yum-updatesd-he22:15:183
277719960,0cyclictest32543-21diskmemload21:34:452
277719960,0cyclictest0-21swapper/220:50:462
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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