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2021-09-17 - 21:19

Intel(R) Atom(TM) CPU D2700 @ 2.13GHz, Linux 4.4.39-rt50 (Profile)

Latency plot of system in rack #1, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack1slot6.osadl.org (updated Fri Sep 17, 2021 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
91640,0rcu_sched3-21ksoftirqd/009:59:350
91630,0rcu_sched37-21ksoftirqd/307:49:353
81620,0rcu_preempt3-21ksoftirqd/010:55:020
81620,0rcu_preempt21-21ksoftirqd/108:00:351
91600,0rcu_sched29-21ksoftirqd/207:34:352
81590,0rcu_preempt3-21ksoftirqd/010:14:340
81590,0rcu_preempt29-21ksoftirqd/208:14:362
91580,0rcu_sched29-21ksoftirqd/209:39:352
91580,0rcu_sched29-21ksoftirqd/207:14:352
81580,0rcu_preempt3-21ksoftirqd/011:39:350
81580,0rcu_preempt21-21ksoftirqd/107:09:361
81570,0rcu_preempt3-21ksoftirqd/010:39:350
81570,0rcu_preempt3-21ksoftirqd/010:30:010
81570,0rcu_preempt3-21ksoftirqd/010:30:010
81570,0rcu_preempt29-21ksoftirqd/209:14:352
81570,0rcu_preempt13924-21crond11:34:350
91560,0rcu_sched3-21ksoftirqd/007:39:360
91560,0rcu_sched3-21ksoftirqd/007:39:360
81560,0rcu_preempt37-21ksoftirqd/309:35:033
81560,0rcu_preempt37-21ksoftirqd/309:14:353
81560,0rcu_preempt3-21ksoftirqd/011:00:350
81560,0rcu_preempt3-21ksoftirqd/008:05:010
81560,0rcu_preempt29-21ksoftirqd/207:39:352
3499560,0migration/3456-21unixbench_singl07:05:043
91550,0rcu_sched29-21ksoftirqd/209:49:352
91550,0rcu_sched21-21ksoftirqd/107:49:361
81550,0rcu_preempt37-21ksoftirqd/312:04:363
81550,0rcu_preempt3-21ksoftirqd/011:55:030
81550,0rcu_preempt3-21ksoftirqd/009:59:550
81550,0rcu_preempt29-21ksoftirqd/209:25:072
81550,0rcu_preempt29-21ksoftirqd/207:54:302
81550,0rcu_preempt21-21ksoftirqd/111:24:511
1599550,0migration/031754-21runrttasks07:04:490
91540,0rcu_sched3-21ksoftirqd/009:09:350
91540,0rcu_sched29-21ksoftirqd/211:49:352
91540,0rcu_sched29-21ksoftirqd/210:59:302
91540,0rcu_sched29-21ksoftirqd/210:49:352
91540,0rcu_sched29-21ksoftirqd/210:14:342
81540,0rcu_preempt37-21ksoftirqd/312:30:053
81540,0rcu_preempt37-21ksoftirqd/311:09:353
81540,0rcu_preempt37-21ksoftirqd/307:34:583
81540,0rcu_preempt3-21ksoftirqd/009:29:520
81540,0rcu_preempt29-21ksoftirqd/211:00:102
81540,0rcu_preempt29-21ksoftirqd/210:09:302
81540,0rcu_preempt21-21ksoftirqd/111:09:351
81540,0rcu_preempt21-21ksoftirqd/110:39:481
81540,0rcu_preempt21-21ksoftirqd/108:04:541
91530,0rcu_sched3-21ksoftirqd/009:29:350
91530,0rcu_sched29-21ksoftirqd/212:34:352
81530,0rcu_preempt37-21ksoftirqd/310:34:523
81530,0rcu_preempt37-21ksoftirqd/309:44:353
81530,0rcu_preempt37-21ksoftirqd/308:39:593
81530,0rcu_preempt37-21ksoftirqd/308:39:593
81530,0rcu_preempt3-21ksoftirqd/011:50:090
81530,0rcu_preempt3-21ksoftirqd/008:24:510
81530,0rcu_preempt29-21ksoftirqd/208:45:092
81530,0rcu_preempt29-21ksoftirqd/208:29:492
81530,0rcu_preempt29-21ksoftirqd/208:20:032
81530,0rcu_preempt29-21ksoftirqd/207:54:412
81530,0rcu_preempt21-21ksoftirqd/111:29:561
81530,0rcu_preempt21-21ksoftirqd/110:30:071
81530,0rcu_preempt21-21ksoftirqd/110:30:071
81530,0rcu_preempt21-21ksoftirqd/109:54:361
81520,0rcu_preempt37-21ksoftirqd/311:00:083
81520,0rcu_preempt37-21ksoftirqd/310:29:363
81520,0rcu_preempt37-21ksoftirqd/310:29:363
81520,0rcu_preempt37-21ksoftirqd/309:15:003
81520,0rcu_preempt29-21ksoftirqd/212:19:352
81520,0rcu_preempt29-21ksoftirqd/211:59:592
81520,0rcu_preempt29-21ksoftirqd/211:49:592
81520,0rcu_preempt29-21ksoftirqd/211:05:032
81520,0rcu_preempt29-21ksoftirqd/210:34:472
81520,0rcu_preempt29-21ksoftirqd/209:49:492
81520,0rcu_preempt29-21ksoftirqd/208:09:582
81520,0rcu_preempt29-21ksoftirqd/208:04:512
81520,0rcu_preempt29-21ksoftirqd/207:44:502
81520,0rcu_preempt21-21ksoftirqd/112:24:351
81520,0rcu_preempt21-21ksoftirqd/112:09:501
81520,0rcu_preempt21-21ksoftirqd/110:00:051
81520,0rcu_preempt21-21ksoftirqd/107:34:501
81520,0rcu_preempt21-21ksoftirqd/107:25:091
81520,0rcu_preempt21-21ksoftirqd/107:20:081
91510,0rcu_sched3-21ksoftirqd/012:09:350
91510,0rcu_sched29-21ksoftirqd/211:19:342
81510,0rcu_preempt37-21ksoftirqd/312:19:543
81510,0rcu_preempt37-21ksoftirqd/312:15:003
81510,0rcu_preempt37-21ksoftirqd/311:39:533
81510,0rcu_preempt37-21ksoftirqd/310:25:093
81510,0rcu_preempt37-21ksoftirqd/309:56:393
81510,0rcu_preempt37-21ksoftirqd/309:25:073
81510,0rcu_preempt37-21ksoftirqd/309:04:533
81510,0rcu_preempt37-21ksoftirqd/308:49:523
81510,0rcu_preempt37-21ksoftirqd/307:29:533
81510,0rcu_preempt3-21ksoftirqd/011:25:000
81510,0rcu_preempt3-21ksoftirqd/011:09:570
81510,0rcu_preempt3-21ksoftirqd/010:04:520
81510,0rcu_preempt3-21ksoftirqd/007:29:360
81510,0rcu_preempt29-21ksoftirqd/212:29:352
81510,0rcu_preempt29-21ksoftirqd/211:29:482
81510,0rcu_preempt29-21ksoftirqd/211:09:502
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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