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2023-05-31 - 07:07

x86 Intel Atom D2700 @2130 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #1, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot6.osadl.org (updated Wed May 31, 2023 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3611030,0irq_work/3381rcuc/319:28:393
361940,0irq_work/3381rcuc/321:22:363
361930,0irq_work/3381rcuc/319:35:103
361890,0irq_work/3381rcuc/323:39:453
361880,0irq_work/3381rcuc/322:26:193
361850,0irq_work/3381rcuc/323:00:593
291850,0irq_work/2311rcuc/200:28:052
291780,0irq_work/2311rcuc/223:14:352
291780,0irq_work/2311rcuc/221:22:362
361760,0irq_work/3381rcuc/321:06:463
361760,0irq_work/3381rcuc/321:06:463
361730,0irq_work/3381rcuc/320:55:303
361730,0irq_work/3381rcuc/320:55:303
361700,0irq_work/3381rcuc/323:30:543
2801799697,0cyclictest3799migration/319:14:133
181660,0irq_work/0161rcuc/020:20:530
361650,0irq_work/3381rcuc/320:37:153
2801599652,0cyclictest2399migration/119:59:121
2801599652,0cyclictest2399migration/119:59:121
2801599652,0cyclictest2399migration/119:19:261
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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