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2025-07-19 - 23:52

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #1, slot #6

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack1slot6s.osadl.org (updated Sat Jul 19, 2025 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
66429910039,10cyclictest14493-21unixbench_multi07:40:370
6646999942,50cyclictest0-21swapper/306:35:253
664299963,55cyclictest0-21swapper/009:55:190
6645998620,30cyclictest17238-21latency_hist10:04:572
664599842,47cyclictest0-21swapper/210:49:432
6645998310,36cyclictest0-21swapper/211:40:222
284032660,3sleep1201ktimersoftd/107:05:151
6642996319,26cyclictest0-21swapper/007:05:200
6644996223,13cyclictest0-21swapper/109:29:571
6644996223,13cyclictest0-21swapper/109:29:571
6646996142,13cyclictest0-21swapper/309:50:243
664699604,48cyclictest0-21swapper/306:25:343
664499605,31cyclictest0-21swapper/109:35:351
6644996024,14cyclictest0-21swapper/110:19:551
6645995939,14cyclictest0-21swapper/208:23:292
6644995934,19cyclictest15154-21needreboot08:50:271
6645995839,13cyclictest0-21swapper/210:24:562
6645995839,13cyclictest0-21swapper/206:40:272
6645995839,13cyclictest0-21swapper/206:40:272
6645995839,13cyclictest0-21swapper/206:20:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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