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2024-05-25 - 08:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 376 highest latencies:
System rack1slot6 (updated Sat May 25, 2024 00:46:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
"interval":200,5413
"cycles":100000000,5412
"load":"idle",5411
"condition":{5410
"clock":"2130"5408
"family":"x86",5407
"vendor":"Intel",5406
"processor":{5404
"dataset":"2024-01-08T15:39:30+0100"5402
"origin":"2024-01-08T12:43:23+0100",5401
"timestamps":{5400
"granularity":"microseconds"5398
8809:16:565396
84,09:16:525395
120,09:17:285394
117,09:17:255393
"maxima":[5392
009:15:285389
0,09:15:285388
0,09:15:285387
0,09:15:285386
0,09:15:285385
0,09:15:285384
0,09:15:285383
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0,09:15:285379
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0,09:15:285331
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0,09:15:285325
0,09:15:285324
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3,09:15:315078
1,09:15:295077
2,09:15:305076
3,09:15:315075
4,09:15:325074
8,09:15:365073
10,09:15:385072
13,09:15:415071
17,09:15:455070
22,09:15:505069
33,09:16:015068
42,09:16:105067
36,09:16:045066
67,09:16:355065
105,09:17:135064
125,09:17:335063
175,09:18:235062
274,09:20:025061
305,09:20:335060
385,09:21:535059
416,09:22:245058
482,09:23:305057
679,09:26:475056
809,09:28:575055
875,09:30:035054
811,09:28:595053
722,09:27:305052
577,09:25:055051
587,09:25:155050
704,09:27:125049
739,09:27:475048
552,09:24:405047
394,09:22:025046
303,09:20:315045
323,09:20:515044
282,09:20:105043
285,09:20:135042
290,09:20:185041
478,09:23:265040
796,09:28:445039
1442,09:39:305038
2389,09:55:175037
2582,09:58:305036
2320,09:54:085035
2491,09:56:595034
3185,10:08:335033
4154,10:24:425032
5045,10:39:335031
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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