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2023-05-28 - 17:35

x86 Intel Atom D2700 @2130 MHz, Linux 5.15.49-rt47 (Profile)

Latency plot of system in rack #1, slot #6
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack1slot6.osadl.org (updated Sun May 28, 2023 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1811440,0irq_work/0161rcuc/010:08:430
3611430,0irq_work/3381rcuc/310:39:103
1811420,0irq_work/0161rcuc/008:18:490
3611350,0irq_work/3381rcuc/307:58:493
3611340,0irq_work/3381rcuc/311:54:123
3611330,0irq_work/3381rcuc/311:29:263
3611330,0irq_work/3381rcuc/307:24:053
3611320,0irq_work/3381rcuc/307:08:493
1811320,0irq_work/0161rcuc/008:28:440
3611280,0irq_work/3381rcuc/309:43:503
3611240,0irq_work/3381rcuc/310:18:493
3611240,0irq_work/3381rcuc/308:39:143
3611210,0irq_work/3381rcuc/312:19:193
3611200,0irq_work/3381rcuc/308:21:223
3611180,0irq_work/3381rcuc/312:24:103
3611150,0irq_work/3381rcuc/309:18:493
1811140,0irq_work/0161rcuc/011:04:230
1811140,0irq_work/0161rcuc/011:04:230
3611130,0irq_work/3381rcuc/309:04:213
3611120,0irq_work/3381rcuc/310:33:003
3611110,0irq_work/3381rcuc/309:24:073
3611110,0irq_work/3381rcuc/308:49:143
3611100,0irq_work/3381rcuc/311:43:493
1811100,0irq_work/0161rcuc/010:24:210
1811100,0irq_work/0161rcuc/009:39:190
1811100,0irq_work/0161rcuc/008:54:480
3611090,0irq_work/3381rcuc/308:59:213
1811080,0irq_work/0161rcuc/009:13:490
3611060,0irq_work/3381rcuc/310:09:193
3611060,0irq_work/3381rcuc/307:39:143
1811060,0irq_work/0161rcuc/010:19:310
3611050,0irq_work/3381rcuc/308:14:223
1811050,0irq_work/0161rcuc/008:43:440
3611040,0irq_work/3381rcuc/309:48:483
1811040,0irq_work/0161rcuc/008:33:490
3611030,0irq_work/3381rcuc/311:36:333
3611030,0irq_work/3381rcuc/309:08:503
3611020,0irq_work/3381rcuc/310:04:123
3611020,0irq_work/3381rcuc/309:59:213
3611020,0irq_work/3381rcuc/309:59:213
3611020,0irq_work/3381rcuc/309:37:253
3611020,0irq_work/3381rcuc/307:19:203
1811020,0irq_work/0161rcuc/007:09:190
3611010,0irq_work/3381rcuc/311:46:033
3611010,0irq_work/3381rcuc/311:24:233
3611010,0irq_work/3381rcuc/307:49:123
3611010,0irq_work/3381rcuc/307:49:123
1811010,0irq_work/0161rcuc/012:14:210
1811010,0irq_work/0161rcuc/012:14:210
1811010,0irq_work/0161rcuc/009:19:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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